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参数资料
| 型号： | MAX17101ETJ+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 27/31页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR DIV PWM CM 32TQFNEP |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 3 |
| 频率 - 最大： | 500kHz |
| 电源电压： | 6 V ~ 24 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 是 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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Dual Quick-PWM, Step-Down Controller
with Low-Power LDO, RTC Regulator
? ? ( I LOAD ) R DS ( ON )
? V IN ( MAX ) ? ? ?
PD ( N L Re sistive ) = ? 1 ? ?
where C OSS is the high-side MOSFET’s output capaci-
tance, Q G(SW) is the charge needed to turn on the
high-side MOSFET, and I GATE is the peak gate-drive
source/sink current (1A typ).
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC adapter voltages
are applied due to the squared term in the switching-
loss equation provided above. If the high-side MOSFET
chosen for adequate R DS(ON) at low battery voltages
becomes extraordinarily hot when subjected to
V IN(MAX) , consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N L ), the worst-case power
dissipation always occurs at maximum battery voltage:
? ? V OUT ? ? 2
? ?
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
This error is greater at higher frequencies (Table 3).
Also, keep in mind that transient response performance
of buck regulators operated too close to dropout is poor,
and bulk output capacitance must often be added (see
the V SAG equation in the Transient Response section).
The absolute point of dropout is when the inductor cur-
rent ramps down during the minimum off-time ( Δ I DOWN )
as much as it ramps up during the on-time ( Δ I UP ). The
ratio h = Δ I UP / Δ I DOWN indicates the controller’s ability
to slew the inductor current higher in response to
increased load, and must always be greater than 1. As
h approaches 1, the absolute minimum dropout point,
the inductor current cannot increase as much during
each switching cycle, and V SAG greatly increases
unless additional output capacitance is used.
A reasonable minimum value for h is 1.5, but adjusting
this up or down allows trade-offs between V SAG , output
capacitance, and minimum operating voltage. For a
given value of h, the minimum operating voltage can be
calculated as:
1 ? ?
greater than I LOAD(MAX) , but are not high enough to
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
V IN ( MIN ) =
V OUT + V CHG
? h × t OFF (MIN) ?
?
? K ?
I LOAD ≈ I VALLEY ( MAX ) + ?
?
?
?
? I LOAD(MAX ) LIR ?
2
where I VALLEY(MAX) is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and sense-resistance variation. The
MOSFETs must have a relatively large heatsink to han-
dle the overload power dissipation.
Choose a Schottky diode (D L ) with a forward voltage
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to 1/3 the load current. This diode is optional and
can be removed if efficiency is not critical.
Applications Information
Step-Down Converter
Dropout Performance
The output-voltage adjustable range for continuous-
conduction operation is restricted by the nonadjustable
where V CHG is the parasitic voltage drop in the charge
path (see the On-Time One-Shot section), t OFF(MIN) is
from the Electrical Characteristics , and K (1/f SW ) is
taken from Table 3. The absolute minimum input volt-
age is calculated with h = 1.
If the calculated V IN(MIN) is greater than the required
minimum input voltage, operating frequency must be
reduced or output capacitance added to obtain an
acceptable V SAG . If operation near dropout is antici-
pated, calculate V SAG to be sure of adequate transient
response.
Dropout Design Example:
V OUT2 = 2.5V
f SW = 355kHz
K = 3.0μs, worst-case K MIN = 3.3μs
t OFF(MIN) = 500ns
V CHG = 100mV
h = 1.5:
1 ? ?
minimum off-time one-shot. For best dropout perfor-
mance, use the slower (200kHz) on-time setting. When
working with low input voltages, the duty-factor limit
must be calculated using worst-case values for on- and
off-times. Manufacturing tolerances and internal propa-
V IN ( MIN ) =
2 . 5 V + 0 . 1 V
? 1.5 × 500ns ?
?
? 3 . 0 μs ?
= 3..47V
gation delays introduce an error to the TON K-factor.
______________________________________________________________________________________
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