参数资料
型号: MAX5073ETI+T
厂商: Maxim Integrated Products
文件页数: 15/25页
文件大小: 0K
描述: IC REG BUCK BST ADJ 1A/2A 28TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压),升压(升压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 28 V
输入电压: 4.5 V ~ 23 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 2.2MHz
电流 - 输出: 1A,2A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 28-TQFN-EP(5x5)
2.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
R A B ? ? OUT ? ? 1 ?
Applications Information
Setting the Switching Frequency
The controller generates the clock signal by dividing
down the internal oscillator or the SYNC input signal when
driven by an external oscillator. The switching frequency
equals half the oscillator frequency (f SW = f OSC / 2). The
internal oscillator frequency is set by a resistor (R OSC )
connected from OSC to SGND. The relationship
between f SW and R OSC is:
12.5 × 10 9
R OSC =
f SW
where f SW and f OSC are in hertz, and R OSC is in ohms.
For example, a 1250kHz switching frequency is set with
R OSC = 10k ? . Higher frequencies allow designs with
lower inductor values and less output capacitance.
Consequently, peak currents and I 2 R losses are lower
at higher switching frequencies, but core losses, gate-
charge currents, and switching losses increase.
A rising clock edge on SYNC is interpreted as a syn-
chronization input. If the SYNC signal is lost, the inter-
nal oscillator takes control of the switching rate,
returning the switching frequency to that set by R OSC .
This maintains output regulation even with intermittent
SYNC signals. When an external synchronization signal
is used, R OSC should be set for the oscillator frequency
to be lower than or equal to the SYNC rate (f SYNC ).
Buck Converter
Effective Input Voltage Range
Although the MAX5073 converters can operate from
input supplies ranging from 5.5V to 23V, the input volt-
age range can be effectively limited by the MAX5073
duty-cycle limitations for a given output voltage. The
maximum input voltage is limited by the minimum on-
where V DROP1 is the total parasitic voltage drops in the
inductor discharge path, which includes the forward
voltage drop (V D ) of the rectifier, the series resistance of
the inductor, and the PC board resistance. V DROP2 is
the total resistance in the charging path, which includes
the on-resistance of the high-side switch, the series
resistance of the inductor, and the PC board resistance.
Setting the Output Voltage
For 0.8V or greater output voltages, connect a voltage-
divider from OUT_ to FB_ to SGND (Figure 5). Select
R B (FB_ to SGND resistor) to between 1k ? and 10k ? .
Calculate R A (OUT_ to FB_ resistor) with the following
equation:
? ? V ? ?
= R
? ?
? ? V FB ? ?
where V FB_ = 0.8V (see the Electrical Characteristics
table) and V OUT_ can range from V FB_ to 28V (boost
operation).
For output voltages below 0.8V, set the MAX5073 out-
put voltage by connecting a voltage-divider from the
output to FB_ to BYPASS (Figure 5). Select R C (FB to
BYPASS resistor) higher than a 50k ? range. Calculate
R A with the following equation:
? V FB ? V OUT ?
R A = R C ? ?
? ? V BYPASS ? V FB ? ?
where V FB = 0.8V, V BYPASS = 2V (see the Electrical
Characteristics table), and V OUT_ can range from 0V
to V FB_ .
time (t ON(MIN) ):
LX_
BYPASS
V IN ( MAX ) ≤
V OUT
t ON ( MIN ) × f SW
FB_
R A
FB_
R C
where t ON(MIN) is 100ns. The minimum input voltage is
V IN ( MIN ) = ? OUT DROP 1 ? + V DROP 2 ? V DROP 1
?
?
limited by the maximum duty cycle (DMAX = 0.88):
? V + V ?
0 . 88
MAX5073
V OUT_ > 0.8V
R B
MAX5073
LX_
V OUT_ < 0.8V
R A
Figure 5. Adjustable Output Voltage
______________________________________________________________________________________
15
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