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| 型号： | MAX5073ETI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 22/25页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BST ADJ 1A/2A 28TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 28 V |
| 输入电压： | 4.5 V ~ 23 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 2.2MHz |
| 电流 - 输出： | 1A，2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 28-TQFN-EP（5x5） |
2.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
3) Calculate C I for a target crossover frequency, f C :
on the top and bottom side of the PC board. Do not
make a direct connection from the exposed pad
V OSC ? ? ( 1 ? D ) + ω C 2 L O C O ? ?
C I =
? ?
2
ω C R F V IN
copper plane to SGND (pin 25) underneath the IC.
2) Isolate the power components and high-current
path from the sensitive analog circuitry.
3) Keep the high-current paths short, especially at the
where ω C = 2 π f C
ground terminals. This practice is essential for sta-
4) Place a pole
( f P 1 =
1
)
2 π × R I × C I at f ZERO,RHP .
ble, jitter-free operation.
4) Connect SGND and PGND together close to the IC
at the ground terminals of VL and V+ bypass capac-
R I =
1
2 π × f ZERO , R HP × C I
itors. Do not connect them together anywhere else.
5) Keep the power traces and load connections short.
This practice is essential for high efficiency. Use
thick copper PC boards (2oz vs. 1oz) to enhance
full-load efficiency.
5) Place the second zero
( f Z 2 =
1
2 π × R 1 × C I
)
at f LC .
6) Ensure that the feedback connection to C OUT is
short and direct.
7) Route high-speed switching nodes (BST_/VDD_,
R 1 =
1
2 π × f LC × C I
? R I
SOURCE_) away from the sensitive analog areas
(BYPASS, COMP_, and FB_). Use the internal PC
board layer for SGND as EMI shields to keep radiat-
6) Place the second pole
(f P 2 =
1
2 π × R F × C CF at 1/2
ed noise away from the IC, feedback dividers, and
analog bypass capacitors.
the switching frequency.
C CF =
C F
( 2 π × 0 . 5 × f SW × R F × C F ) ? 1
Improving Noise Immunity
In applications where the MAX5073 are subject to noisy
environments, adjust the controller’s compensation to
improve the system ’s noise immunity. In particular,
high-frequency noise coupled into the feedback loop
causes jittery duty cycles. One solution is to lower the
crossover frequency (see the Compensation section).
PC Board Layout Guidelines
Careful PC board layout is critical to achieve low
switching losses and clean, stable operation. This is
especially true for dual converters where one channel
can affect the other. Refer to the MAX5073 EV kit data
sheet for a specific layout example. Use a multilayer
board whenever possible for better noise immunity.
Follow these guidelines for good PC board layout:
1) For SGND, use a large copper plane under the IC
and solder it to the exposed paddle. To effectively
use this copper area as a heat exchanger between
the PC board and ambient, expose this copper area
22
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相关代理商/技术参数 |
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|---|---|
| MAX5073ETJ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| MAX5074AAUP+T | 制造商:Maxim Integrated Products 功能描述: |
| MAX5074AUP | 功能描述:功率驱动器IC RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MAX5074AUP+ | 功能描述:功率驱动器IC for Iso IEEE 802.3af PD & Telecom Aps RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MAX5074AUP+T | 功能描述:功率驱动器IC for Iso IEEE 802.3af PD & Telecom Aps RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
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