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| 型号： | MAX5951ETJ+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 15/25页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 88% |
| 电源电压： | 4.5 V ~ 16 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
12V/5V Input Buck PWM Controller
R 4 =
? 1 ?
? V OUT ?
? V FB
Setting the Output Voltage
Connect a resistive divider from OUT to FB to AGND to
set the output voltage. First, calculate the resistor from
OUT to FB using the guidelines in the Compensation
Design Guidelines section. Once R3 is known, calcu-
late R4 using the following equation:
R 3
?
?
Input Capacitor Selection
The discontinuous input current of the buck converter
causes large input ripple currents; therefore, the input
capacitor must be carefully chosen to withstand the
input ripple current and maintain the input voltage rip-
ple within design requirements. The total voltage ripple
is the sum of ? V Q (caused by the capacitor discharge)
and ? V ESR (caused by the ESR of the input capacitor),
which peaks at the end of the on cycle. Calculate the
input capacitance and ESR required for a specified rip-
ple using the following equations:
? ? I P ? P ?
? I LOAD ( MAX ) + ?
I LOAD ( MAX ) × ? OUT ?
where V FB = 0.8V.
Inductor Selection
Three key inductor parameters must be specified for
operation with the MAX5951: inductance value (L), peak
inductor current (I PEAK ), and inductor saturation current
(I SAT ). The minimum required inductance is a function of
operating frequency, input-to-output voltage differential,
and the peak-to-peak inductor current ( ? I P-P ). Higher
? I P-P allows for a lower inductor value. A lower induc-
where
ESR =
C IN =
? 2 ?
? V ESR
? V ?
? V IN ?
? V Q × f SW
tance value minimizes size and cost and improves large-
signal and transient response, but reduces efficiency
due to higher peak currents and higher peak-to-peak
? I P ? P =
( V IN ? V OUT ) × V OUT
V IN × f SW × L
V OUT ( V IN ? V OUT )
V IN × f SW × ? I P ? P
? I P ? P
8 × C OUT × f SW
? I P ? P
? V ESR = ESR ×
output voltage ripple for the same output capacitor. A
higher inductance increases efficiency by reducing the
ripple current; however, resistive losses due to extra wire
turns can exceed the benefit gained from lower ripple
current levels especially when the inductance is
increased without also allowing for larger inductor
dimensions. A good rule of thumb is to choose ? I P-P
equal to 30% of the full-load current. Calculate the induc-
tor using the following equation:
L =
V IN and V OUT are typical values so that efficiency is
optimum for typical conditions. The switching frequen-
cy is programmable between 100kHz and 1000kHz
(see the Oscillator/Synchronization Input (SYNCIN)/
Synchronization Output (SYNCOUT) section). The
peak-to-peak inductor current, which reflects the peak-
to-peak output ripple, is worst at the maximum input
voltage. See the output capacitor selection section to
verify that the worst-case output current ripple is
acceptable. The inductor saturation current (I SAT ) is
also important to avoid runaway current during continu-
ous output short-circuit conditions. Select an inductor
with an I SAT specification higher than the maximum
peak current.
I LOAD(MAX) is the maximum output current, ? I P-P is the
peak-to-peak inductor current, and f SW is the switching
frequency.
The MAX5951 includes UVLO hysteresis to avoid possi-
ble unintentional chattering during turn-on. Use addi-
tional bulk capacitance if the input source impedance is
high. When the input voltage is near the UVLO, addition-
al input capacitance helps avoid possible undershoot
below the UVLO threshold during transient loading.
Output Capacitor Selection
The allowed output-voltage ripple and the maximum
deviation of the output voltage during load steps deter-
mine the required output capacitance and its ESR. The
output ripple is mainly composed of ? V Q (caused by
the capacitor discharge) and ? V ESR (caused by the
voltage drop across the ESR of the output capacitor).
The equations for calculating the peak-to-peak output-
voltage ripple are:
? V Q =
2
? V ESR and ? V Q are not directly additive since they are
out of phase from each other. If using ceramic capaci-
tors, which generally have low ESR, ? V Q dominates. If
using electrolytic capacitors, ? V ESR dominates.
______________________________________________________________________________________
15
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| MAX5952AEVKIT | 功能描述:电源管理IC开发工具 Evaluation Kit/Evaluation System for the MAX5952A RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
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