参数资料
型号: MAX6852AEE+T
厂商: Maxim Integrated
文件页数: 7/32页
文件大小: 0K
描述: IC VFD CTRLR MATRIX 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
显示器类型: 真空荧光 (VF)
配置: 5 x 7(矩阵)
接口: 串行
电流 - 电源: 3.5mA
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 带卷 (TR)
4-Wire Interfaced, 5 ? 7 Matrix Vacuum-
Fluorescent Display Controller
GRID 1
GRID 2
GRID 3
GRID 4
GRID 5
GRID 6
GRID 7
GRID 8
Figure 2. Example of a Two-Digits-per-Grid Display (8 Grids, 16 Digits)
° C ° F pH mW
4 ANNUNCIATOR SEGMENTS
MICROCONTROLLER
VFD TUBE DRIVER
MAX6852
5 x 7 MATRIX CHARACTER
WITH 35 SEGMENTS
DOUT
SCLK
DIN
SCLK
VFDOUT
VFCLK
VFDIN
VFCLK
DECIMAL POINT (DP) SEGMENT
CURSOR SEGMENT
CS
CS
VFLOAD
VFBLANK
VFLOAD
VFBLANK
GRID/
ANODE
DRIVERS
Figure 3. Digit Structure with 5 ? 7 Matrix Character, DP
Segment, Cursor Segment, Four Annunciators
The cursor segment is controlled differently. A single
register selects one digit ’ s cursor from the entire dis-
play, and that can be lit either continuously or blinking.
All the other digits ’ cursors are off.
The designations of DP, cursor, and annunciator are
interchangeable. For example, consider an application
requiring only one DP lit at a time, but the DP needs to
blink. The DP function does not have blink capability.
Instead, the DP segments on the display are routed
(using the output map) to the cursor function. In this
case, the DP segments are controlled using the cursor
register.
The output of the controller is a 4-wire serial stream that
interfaces to industry-standard, shift-register, high-volt-
age grid/anode VFD tube drivers (Figure 4). This inter-
face uses three outputs to transfer and latch grid and
anode data into the tube drivers, and a fourth output
that enables/disables the tube driver outputs (Figure 5).
The enable/disable control is modulated by the
MAX6852 for both PWM intensity control and interdigit
blanking, and disables the tube driver in shutdown. The
Figure 4. Connection of the MAX6852 to VFD Driver and VFD Tube
controller multiplexes the display by enabling each grid
of the VFD in turn for 100μs (OSC = 4MHz) with the cor-
rect segment (anode) data. The data for the next grid is
transferred to the tube drivers during the display time of
the current grid.
The controller uses an internal output map to match any
tube-driver ’ s shift-register grid/anode order, and is
therefore compatible with all VFD internal chip-in-glass
or external tube drivers.
The MAX6852 provides five high-current output ports,
which can be configured for a variety of functions:
The PUMP output can be configured as either an
80kHz (OSC = 4MHz) clock intended for DC-DC con-
verter use, the 4-wire serial interface ’ s DOUT data out-
put, or a general-purpose logic output.
The PHASE1 and PHASE2 outputs can be individually
configured as either 10kHz PWM outputs (OSC =
4MHz) intended for filament driving, blink status out-
puts, or general-purpose logic outputs.
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7
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