参数资料
型号: MAX7032ATJ+T
厂商: Maxim Integrated
文件页数: 16/32页
文件大小: 0K
描述: IC TRASCEIVER ASK/FSK 32TQFN
其它有关文件: Automotive Product Guide
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
频率: 300MHz ~ 450MHz
数据传输率 - 最大: 33kbps
调制或协议: ASK,FSK,OOK
应用: 车库门开启器,遥控,双向 RKE
功率 - 输出: 10dBm
灵敏度: -114dBm
电源电压: 2.1 V ~ 3.6 V,4.5 V ~ 5.5 V
电流 - 接收: 6.7mA
电流 - 传输: 12.5mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 125°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
Low-Cost, Crystal-Based, Programmable,
ASK/FSK Transceiver with Fractional-N PLL
MINIMUM PEAK
MAX7032
DETECTOR
MAX7032
PDMIN
PEAK
PEAK
DATA
SLICER
DET
DET
BASEBAND
FILTER
TRK_EN = 1
MAXIMUM PEAK
DETECTOR
TO SLICER
INPUT
DATA
C
PDMAX
R
R
PDMIN
C
PDMAX
TRK_EN = 1
Figure 4. Generating Data Slicer Threshold Using the Peak
Detectors
Figure 5. Peak-Detector Track Enable
The maximum and minimum peak detectors can be
used together to form a data slicer threshold voltage at
a value midway between the maximum and minimum
voltage levels of the data stream (see the Data Slicer
section and Figure 4). The RC time constant of the
peak-detector combining network should be set to at
least 5 times the data period.
If there is an event that causes a significant change in
RECEIVER ENABLED, TRK_EN SET
TRK_EN CLEARED
MAX PEAK DETECTOR
the magnitude of the baseband signal, such as an AGC
gain switch or a power-up transient, the peak detectors
may “catch” a false level. If a false peak is detected,
the slicing level is incorrect. The MAX7032 has a fea-
200mV/div
FILTER OUTPUT
MIN PEAK DETECTOR
DATA OUTPUT
ture called peak-detector track enable (TRK_EN),
where the peak-detector outputs can be reset (see
Figure 5). If TRK_EN is set (logic 1), both the maximum
and minimum peak detectors follow the input signal.
When TRK_EN is cleared (logic 0), the peak detectors
revert to their normal operating mode. The TRK_EN
function is automatically enabled for a short time when-
ever the IC is first powered up, or transitions from trans-
mit to receive mode, or recovers from the sleep portion
of DRX mode, or when an AGC gain switch occurs
regardless of the bit setting. Since the peak detectors
exhibit a fast-attack/slow-decay response, this feature
allows for an extremely fast startup or AGC recovery.
See Figure 6 for an illustration of a fast-recovery
sequence. In addition to the automatic control of this
function, the TRK_EN bits can be controlled through the
serial interface (see the Serial Control Interface section).
Transmitter
Power Amplifier (PA)
The PA of the MAX7032 is a high-efficiency, open-
drain, switch-mode amplifier. The PA with proper
DATA OUTPUT
2V/div
100 μ s/div
Figure 6. Fast Receiver Recovery in FSK Mode Utilizing Peak
Detectors
output-matching network can drive a wide range of
antenna impedances, which includes a small-loop PCB
trace and a 50 Ω antenna. The output-matching network
for a 50 Ω antenna is shown in the Typical Application
Circuit. The output-matching network suppresses the
carrier harmonics and transforms the antenna imped-
ance to an optimal impedance at PAOUT (pin 5). The
optimal impedance at PAOUT is 250 Ω .
When the output-matching network is properly tuned,
the PA transmits power with a high overall efficiency of
up to 32%. The efficiency of the PA itself is more than
46%. The output power is set by an external resistor at
PAOUT and is also dependent on the external antenna
and antenna-matching network at the PA output.
16
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