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参数资料
| 型号： | MB90F543GPF-GE1 |
| 厂商： | FUJITSU LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, ROHS COMPLIANT, PLASTIC, QFP-100 |
| 文件页数： | 2/72页 |
| 文件大小： | 1798K |
| 代理商： | MB90F543GPF-GE1 |
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MB90540G/545G Series
10
DS07-13703-7E
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP*2
QFP*1
11
13
P33
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode, external bus 8-bit mode or
when WRH pin output is disabled.
WRH
Write strobe output pin for the 8 higher bits of the data bus.
This function is enabled when the external bus is enabled,
when the external bus 16-bit mode is selected, and when the
WRH output pin is enabled.
12
14
P34
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode or when the hold function is
disabled.
HRQ
Hold request input pin. This function is enabled when both the
external bus and the hold functions are enabled.
13
15
P35
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode or when the hold function is
disabled.
HAK
Hold acknowledge output pin. This function is enabled when
both the external bus and the hold functions are enabled.
14
16
P36
I
General I/O port with programmable pullup. This function is
enabled in the single-chip mode or when the external ready
function is disabled.
RDY
Ready input pin. This function is enabled when both the
external bus and the external ready functions are enabled.
15
17
P37
H
General I/O port with programmable pullup. This function is
enabled in the single-chip mode or when the CLK output is dis-
abled.
CLK
CLK output pin. This function is enabled when both the
external bus and CLK outputs are enabled.
16
18
P40
G
General I/O port. This function is enabled when UART0
disables the serial data output.
SOT0
Serial data output pin for UART0. This function is enabled
when UART0 enables the serial data output.
17
19
P41
G
General I/O port. This function is enabled when UART0
disables serial clock output.
SCK0
Serial clock I/O pin for UART0. This function is enabled when
UART0 enables the serial clock output.
18
20
P42
G
General I/O port. This function is always enabled.
SIN0
Serial data input pin for UART0. Set the corresponding Port
Direction Register to input if this function is used.
19
21
P43
G
General I/O port. This function is always enabled.
SIN1
Serial data input pin for UART1. Set the corresponding Port
Direction Register to input if this function is used.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MB90F543GPFR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F543GSPFR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F543GSPMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F543PFR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F546GPFR-GE1 | 制造商:FUJITSU 功能描述: |
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