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| 型号： | MC33580BAPNAR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 18/38页 |
| 文件大小： | 0K |
| 描述： | IC SW QUAD HI SIDE 15MOHM 24PQFN |
| 标准包装： | 1,200 |
| 类型： | 高端 |
| 输入类型： | SPI |
| 输出数： | 4 |
| 导通状态电阻： | 15 毫欧 |
| 电源电压： | 6 V ~ 27 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-PowerQFN |
| 供应商设备封装： | 24-PQFN（12x12） |
| 包装： | 带卷 (TR) |
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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
SPI PROTOCOL DESCRIPTION
The SPI interface has a full duplex, three-wire
synchronous data transfer with four I/O lines associated with
it: Serial Input (SI), Serial Output (SO), Serial Clock (SCLK),
and Chip Select ( CS ).
The SI / SO pins of the 33580 follow a first-in first-out (D15
to D0) protocol, with both input and output words transferring
the most significant bit (MSB) first. All inputs are compatible
with 5.0 V CMOS logic levels.
CSB
SCLK
CS
SI
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SO
OD15 OD14 OD13 OD12 OD11 OD10 OD9
OD8
OD7
OD6
OD5
OD4
OD3
OD2
OD1 OD0
Notes 1. RST is a logic [1] state during the above operation.
D15 : in logic H to most above ordered
DO, D1, : D2, ... , and D15 to the the 16 bits of entry of and data the LUX IC out of
NOTES: 1. 2. RSTB is D0 a relate state the during the recent operation. entry of data into the device.
2. 3. OD15 OD0 relate relate to first most recent ordered fault program status into data device. the device.
Figure 9. Single 16-Bit Word SPI Communication
OPERATIONAL MODES
The 33580 has four operating modes: Sleep, Normal,
Fault, and Fail-Safe. Table 5 summarizes details contained in
succeeding paragraphs.
Table 5. Fail-Safe Operation and Transitions to Other
33580 Modes
Mode FS Wake RST WDTO Comments
SLEEP MODE
The Default mode of the 33580 is the Sleep mode. This is
the state of the device after first applying battery voltage
(V PWR ) prior to any I/O transitions. This is also the state of the
device when the WAKE and RST are both logic [0]. In the
Sleep mode, the output and all unused internal circuitry, such
as the internal 5.0 V regulator, are off to minimize current
Sleep
Normal
Fault
x
1
0
0
0
x
1
1
0
1
1
0
x
No
No
Device is in Sleep mode. All
outputs are OFF
Normal mode. Watchdog is
active if enabled.
Device is currently in fault
mode. The faulted output(s)
is (are) OFF.
draw. In addition, all SPI-configurable features of the device
are as if set to logic [0]. The 33580 will transition to the
Normal or Fail-Safe operating modes based on the WAKE
NORMAL MODE
The 33580 is in Normal mode when:
0
0
1
? V PWR and V DD are within the normal voltage range.
1
1
0
1
1
1
Watchdog has timed out and
the device is in Fail-Safe
Mode. The outputs are as
? RST pin is logic [1].
? No fault has occurred.
Fail-
1
1
0
Yes
configured with the RFS
resistor connected to FSI.
FAIL-SAFE MODE
Safe
x = Don’t care.
RST and WAKE must go
from logic [1] to logic [0]
simultaneously to bring the
device out of the Fail-safe
mode or momentarily tied the
FSI pin to ground.
Fail-Safe Mode and Watchdog
If the FSI input is not grounded, the watchdog timeout
detection is active when either the WAKE or RST input pin
transitions from logic [0] to logic [1]. The WAKE input is
capable of being pulled up to V PWR with a series of limiting
33580
Analog Integrated Circuit Device Data
18
Freescale Semiconductor
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