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参数资料
| 型号： | MC34704BEPR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 29/54页 |
| 文件大小： | 0K |
| 描述： | IC PWR MNGMT DC-DC MULT 56-QFN |
| 特色产品： | MC34704 Multi-channel Power Management IC (PMIC) |
| 标准包装： | 1 |
| 应用： | 处理器 |
| 电流 - 电源： | 86mA |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘 |
| 供应商设备封装： | 56-QFN-EP（7x7） |
| 包装： | 标准包装 |
| 产品目录页面： | 809 (CN2011-ZH PDF) |
| 其它名称： | MC34704BEPR2DKR |
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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
? In any of the previous shutdown sequences, VG output will
stay alive to maintain internal circuitry and logic until all
other regulators are off, then it will shut off.
POWER SUPPLY
The battery voltage range is the following depending on
the application:
? 1-cell Li-Ion/Polymer: 2.7 to 4.2 V. Typ value is 3.6 V
? USB supply or AC wall adapter: 4.5 to 5.5 V. Typ value is
5.0 V. This gives a total input voltage supply range of 2.7
to 5.5 V
For the regulators, each one will be supplied separately
through its own power input.
LION PIN
LION pin is always tied to VIN level.
FREQUENCY SETTING PIN (FREQ PIN)
There are two switching frequencies on board the 34704,
one for REG6, 7 & 8, and the other for the rest of the
regulators. To avoid any jitter or interference problems by
having two oscillators on board, the switching frequency will
be derived from the main oscillator using a frequency divider.
The switching frequency will be selectable for all of the
regulators. REG6, 7 & 8 switching frequency (F SW2 ) will be
selectable through I 2 C to be between 250 kHz and 1.0 MHz
in 250 kHz steps. The rest of the regulators switching
frequency (F SW1 ) will be selectable through the FREQ pin
and can be selected between 750 kHz and 2.0 MHz, in
250 kHz steps.
F SW1 default value is 2.0 MHz. This value is obtained by
tying the FREQ pin to VDDI. F SW2 default value is 500 kHz.
F SW1 will be selectable through programming the FREQ
pin with an external resistor divider connected between VDDI
and AGND pins. F SW2 will only be selectable through I 2 C.
Please refer to the “I 2 C Programmability” section.
The 34704 uses 4 different phases of switching (clock is
80 degrees out of phase) for F SW1 to spread out the current
draw by the individual converters from the input supply over
time to reduce the peak input current demand. This allows for
better EMI performance and reduction in the input filter
requirements. F SW1 has no phase relation with F SW2 . The
following distribution is shown for F SW1 of 2.0 MHz. The
regulators grouping is based on their maximum current draw
and attempts to reduce the effect on the input current draw.
500 ns
REG1/VG
REG2
REG5, REG3
REG4
500 ns
REG1/VG
REG2
REG5, REG3
REG4
500 ns
REG1/VG
REG2
REG5, REG3
REG4
500 ns
REG1/VG
REG2
SOFT START PIN (SS PIN)
Initially at power up, the soft start time will be set for all of
the regulators through programming the SS pin with an
external resistor divider connected between VDDI and AGND
pins (see the 34704A Typical Application Diagram ).
After power up, the soft start value for REG5 through
REG8 can be changed and programmed through I 2 C. REG2
through REG4 soft start value is only set by the SS pin and
cannot be programmed through I 2 C.
See section “I 2 C Programmability” for more details.
ONOFF PIN
This is a hardware enable/disable feature OR pin for
the 34704 :
? It can be connected to a mechanical switch to turn the
power On or Off
? The device is power off by a command via the I 2 C interface
as well
? The power off by hardware can be masked by a command
via the I 2 C interface
? If the device is off and a falling edge is detected at the
? If and only if the device is on and the ONOFF pin is pulled
down for a time period (1s as a default and selectable to
2.0 sec, 1.5 sec, 1.0 sec or 0.5 sec via the I 2 C interface),
then the device powers off after a second time period
elapses unless it is masked by a command via the I 2 C
interface:
? The second period is the same amount of time as the
first period so that the counter can be shared
? When the first period elapses a shutdown flag is set to
alert the processor that a shutdown signal has been
activated. The ONOFF pin can be released after this
flag is set without affecting what will happen next
? A CPU can read out the shutdown flag to determine
what to do
? Power off the device immediately by a command via I 2 C
interface (ALLOFF command)
? Ignore the power off by sending a command via I 2 C
interface to clear the shutdown flag
ONOFF pin, the device starts up
34704
Analog Integrated Circuit Device Data
Freescale Semiconductor
29
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