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参数资料
| 型号： | MC34704BEPR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 7/54页 |
| 文件大小： | 0K |
| 描述： | IC PWR MNGMT DC-DC MULT 56-QFN |
| 特色产品： | MC34704 Multi-channel Power Management IC (PMIC) |
| 标准包装： | 1 |
| 应用： | 处理器 |
| 电流 - 电源： | 86mA |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-VFQFN 裸露焊盘 |
| 供应商设备封装： | 56-QFN-EP（7x7） |
| 包装： | 标准包装 |
| 产品目录页面： | 809 (CN2011-ZH PDF) |
| 其它名称： | MC34704BEPR2DKR |
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PIN CONNECTIONS
Table 2. 34704 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on page 17 .
Pin Number Device Pin Name Pin Function
Formal Name
Definition
47
A/B
SW2D
Input/Output
REG2 Buck Stage
The inductor is connected between this pin and the SW2U pin.
switching node
48
A/B
VOUT2
Output
REG2 regulated output
Connect this pin to the load and to the output filter as close to
voltage pin
the pin as possible.
49
A/B
SW2U
Input/Output
REG2 Boost Stage
The inductor is connected between this pin and the SW2D pin.
switching node
50
A/B
SW5U
Input/Output
REG5 Boost Stage
The inductor is connected between this pin and the SW5D pin.
switching node
51
A/B
VOUT5
Output
REG5 regulated output
Connect this pin to the load and to the output filter as close to
voltage pin
the pin as possible.
52
A/B
SW5D
Input/Output
REG5 Buck Stage
The inductor is connected between this pin and the SW5U pin.
switching node
53
A/B
PVIN5
Power
REG5 power supply input
This is the connection to the drain of the high side switch FET.
voltage
Input decoupling /filtering is required for proper REG5 operation.
Use a 10uf decoupling capacitor for better performance
54
A/B
BT5D
Passive
REG5 Buck Stage
Connect a 1.0 μ F capacitor between this pin and SW5D pin to
bootstrap capacitor input
pin
enhance the gate of the Switch Power MOSFET.
55
A/B
FB5
Input
REG5 voltage feedback
Connect the feedback resistor divider to this pin.
input for voltage
regulation/programming
56
A/B
COMP5
Passive
REG5 compensation
REG5 compensation network connection.
network connection
Exposed
A/B
PGND
Ground
Power Ground
Power Ground Connection for all of the regulators except
Pad
Connection for all of the
REG7. This pad is provided to enhance thermal performance.
regulators except REG7
Notes
1. If regulator 1 is not used, leave pin 23 Unconnected, All other components should be used to provide VG to the system
2. If regulators 5, 6, 7 and 8 are not used, connect the corresponding pins as follows: FB, SW and VOUT nodes: tied to GND; BT, COMP
and PVIN pins: Not connected; DRV and VREF nodes (REG7 only): Not connected
3. REG 2,3 and 4 should always be populated.
34704
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
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