参数资料
型号: MC35XS3400DPNAR2
厂商: Freescale Semiconductor
文件页数: 20/46页
文件大小: 0K
描述: IC SWITCH HIGH SIDE QUAD 24QFN
标准包装: 1,200
类型: 高端开关
输出数: 4
Rds(开): 35 毫欧
内部开关:
电流限制: 6A
输入电压: 6 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-PowerQFN
供应商设备封装: 24-PQFN(12x12)
包装: 带卷 (TR)
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
GROUND (GND)
These pins are the ground for the device.
POSITIVE POWER SUPPLY (VPWR)
This pin connects to the positive power supply and is the
source of operational power for the device. The VPWR
contact is the backside surface mount tab of the package.
SERIAL OUTPUT (SO)
The SO data pin is a tri-stateable output from the shift
register. The SO pin remains in a high-impedance state until
the CS pin is put into a logic [0] state. The SO data is capable
of reporting the status of the output, the device configuration,
the state of the key inputs, etc. The SO pin changes state on
the rising edge of SCLK and reads out on the falling edge of
SCLK. SO reporting descriptions are provided in Table 23 ,
HIGH SIDE OUTPUTS (HS3, HS1, HS0, HS2)
Protected 35 m ? high side power outputs to the load.
FAIL-SAFE INPUT (FSI)
This pin incorporates an active internal pull-up current
source from internal supply (V REG ). This enables the
watchdog timeout feature.
When the FSI pin is opened, the watchdog circuit is
enabled. After a watchdog timeout occurs, the output states
depends on IN[0:3].
When the FSI pin is connected to GND, the watchdog
circuit is disabled. The output states depends on IN[0:3] in
case of V DD failure condition, in case V DD failure detection is
activated (VDD_FAIL_en bit sets to logic [1]).
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
MCU
POWER SUPPLY
MCU INTERFACE and
OUTPUT CONTROL
SPI INTERFACE
PARALLEL CONTROL
INPUTS
SELF-
PROTECTED
HIGH SIDE
SWITCHES
HS0-HS3
POWER SUPPLY
INTERFACE
PWM CONTROLLER
28 W bulbs and LED modules. 55 W/65 W lamps can be
The 35XS3400 is designed to operate from 4.0 to 28 V on
the VPWR pin. Characteristics are provided from 6.0 to 20 V
for the device. The VPWR pin supplies power to internal
regulator, analog, and logic circuit blocks. The VDD supply is
used for Serial Peripheral Interface (SPI) communication in
order to configure and diagnose the device. This IC
architecture provides a low quiescent current Sleep mode.
Applying V PWR and V DD to the device will place the device in
the Normal mode. The device will transit to Fail-safe mode in
case of failures on the SPI or/and on the V DD voltage.
HIGH SIDE SWITCHES: HS0 – HS3
These pins are the high side outputs controlling
automotive lamps located for the rear of vehicle, such as
driven for two outputs shorted together. Those N-channel
MOSFETs with 35 m ? R DS(ON) are self-protected and
present extended diagnostics in order to detect bulb outage
and short-circuit fault condition. The HS output is actively
clamped during turn off of inductive loads and inductive
battery line.
When driving DC motor or solenoid loads demanding
multiple switching, an external recirculation device must be
used to maintain the device in its Safe Operating Area.
MCU INTERFACE AND OUTPUT CONTROL
In Normal mode, each bulb is controlled directly from the
MCU through SPI. A pulse width modulation control module
allows improvement of lamp lifetime with bulb power
35XS3400
Analog Integrated Circuit Device Data ?
20
Freescale Semiconductor
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