参数资料
型号: MC35XS3400DPNAR2
厂商: Freescale Semiconductor
文件页数: 26/46页
文件大小: 0K
描述: IC SWITCH HIGH SIDE QUAD 24QFN
标准包装: 1,200
类型: 高端开关
输出数: 4
Rds(开): 35 毫欧
内部开关:
电流限制: 6A
输入电压: 6 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-PowerQFN
供应商设备封装: 24-PQFN(12x12)
包装: 带卷 (TR)
FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
the failure condition must disappear and the auto-retry
circuitry must be active or the corresponding output must be
commanded OFF and then ON (toggling fault_control signal
of corresponding output) or V SUPPLY(POR) condition if
V DD = 0.
The SPI fault report (OC[0:3] bits) is removed after a read
operation.
In Normal mode using the internal PWM module, the
35XS3400 also incorporates a cooling bulb filament
management, if the OC_mode is set to logic [1]. In this case,
the 1 st step of multi-step over-current protection will depend
to the previous OFF duration, as illustrated in Figure 6 . The
following figure illustrates the current level will be used in
function to the duration of previous OFF state (toff). The slope
of cooling bulb emulator is configurable with OCOFFCB[1:0]
(V PWR > V PWR(OV) ). The outputs remain in the OFF state until
the over-voltage condition is removed (V PWR < V PWR(OV) -
V PWR(OVHYS) ). When experiencing this fault, the OVF fault bit
is set to logic [1] and cleared after either a valid SPI read.
The over-voltage protection can be disabled through SPI
(OV_dis bit is disabled set to logic [1]). The fault register
reflects any over-voltage condition (V PWR > V PWR(OV) ). This
over-voltage diagnosis, as a warning, is removed after a read
operation, if the fault condition disappears. The HS[0:3]
outputs are not commanded in R DS(ON) above the OV
threshold.
In Fail-safe mode, the over-voltage activation depends on
the RST logic state; enable for RST = 1 and disable for
RST = 0. The device is still protected with over-temperature
protection in case the over-voltage feature is disabled.
bits.
Under-voltage Fault
hson signal
PWM
Depending on toff
depending to toff
Over-current thresholds
Cooling
toff
fault_control
hson
Severe Short-circuit Fault
The 35XS3400 provides output shutdown in order to
protect each output in case of severe short-circuit during of
the output switching.
If the short-circuit impedance is below R SHORT , the device
will latch the output OFF, FS will go to logic [0] and the fault
register SC[0:3] bit will be set to [1]. To delatch the fault and
be able to turn ON again the outputs, the failure condition
must disappear and the corresponding output must be
commanded OFF, and then ON (toggling fault_control signal
of corresponding output) or V SUPPLY(POR) condition, if
V DD = 0.
The SPI fault report (SC[0:3] bits) is removed after a read
operation.
Over-voltage Fault (Enabled by default)
By default, the over-voltage protection is enabled. The
35XS3400 shuts down all outputs and FS will go to logic [0]
The output(s) will latch off at some battery voltage below
VPWR (UV) . As long as the V DD level stays within the normal
specified range, the internal logic states within the device will
remain (configuration and reporting).
In the case where battery voltage drops below the under-
voltage threshold (V PWR < V PWR(UV) ), the outputs will turn off,
FS will go to logic [0], and the fault register UV bit will be set
to [1].
Two cases need to be considered when the battery level
recovers (V PWR > V PWR(UV)_UP ):
? If the output command is OFF, FS will go to logic [1], but
the UV bit will remain set to 1 until the next read
operation (warning report).
? If the output command is ON, FS will remain at logic [0].
To delatch the fault and be able to turn ON again the
outputs, the failure condition must disappear and the
autoretry circuitry must be active or the corresponding
output must be commanded OFF and then ON (toggling
fault_control signal of corresponding output) or
V SUPPLY(POR) condition if V DD = 0.
In extended mode , the output is protected by over-
temperature shutdown circuitry. All previous latched faults,
occurred when VPWR was within the normal voltage range,
are guaranteed if VDD is within the operational voltage range
or until V SUPPLY(POR) if VDD = 0. Any new OT fault is
detected (VDD failure included) and reported through SPI
above VPWR (UV) . The output state is not changed as long as
the VPWR voltage does not drop any lower than 3.5 V typical.
All latched faults (over-temperature, over-current, severe
short-circuit, over and under-voltage) are reset if:
? V DD < V DD(FAIL) with V PWR in nominal voltage range,
? V DD and V PWR supplies is below V SUPPLY(POR) voltage
value.
during an over-voltage fault condition on the VPWR pin
35XS3400
Analog Integrated Circuit Device Data ?
26
Freescale Semiconductor
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