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参数资料
| 型号： | MC56F8246VLF |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 30/88页 |
| 文件大小： | 0K |
| 描述： | DSC 48K FLASH 60MHZ 48-LQFP |
| 标准包装： | 250 |
| 系列： | 56F8xxx |
| 核心处理器： | 56800E |
| 芯体尺寸： | 16-位 |
| 速度： | 60MHz |
| 连通性： | CAN，I²C，LIN，SCI，SPI |
| 外围设备： | LVD，POR，PWM，WDT |
| 输入/输出数： | 39 |
| 程序存储器容量： | 48KB（24K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 3K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 数据转换器： | A/D 10x12b，D/A 1x12b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 48-LQFP |
| 包装： | 管件 |
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MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
General System Control Information
Freescale Semiconductor
36
5
General System Control Information
5.1
Overview
This section discusses power pins, reset sources, interrupt sources, clock sources, the system integration module (SIM), ADC
synchronization, and JTAG/EOnCE interfaces.
5.2
Power Pins
VDD, VSS and VDDA, VSSA are the primary power supply pins for the device. The voltage source supplies power to all on-chip
peripherals, I/O buffer circuitry, and internal voltage regulators. The device has multiple internal voltages to provide regulated
lower-voltage sources for the peripherals, core, memory, and on-chip relaxation oscillators.
Typically, at least two separate capacitors are across the power pins to bypass the glitches and provide bulk charge storage. In
this case, a bulk electrolytic or tantalum capacitor, such as a 10 F tantalum capacitor, should provide bulk charge storage for
the overall system, and a 0.1 F ceramic bypass capacitor should be located as near to the device power pins as is practical to
suppress high-frequency noise. Each pin must have a bypass capacitor for optimal noise suppression.
VDDA and VSSA are the analog power supply pins for the device. This voltage source supplies power to the ADC, PGA, and
CMP modules. A 0.1 F ceramic bypass capacitor should be located as near to the device VDDA and VSSA pins as is practical
to suppress high-frequency noise. VDDA and VSSA are also the voltage reference high and voltage reference low inputs,
respectively, for the ADC module.
5.3
Reset
Resetting the device provides a way to start processing from a known set of initial conditions. During reset, most control and
status registers are forced to initial values, and the program counter is loaded from the reset vector. On-chip peripheral modules
are disabled and I/O pins are initially configured at the reset status shown in Table 5 on page 18.
The MC56F825x/MC56F824x has the following sources for reset:
Power-on reset (POR)
Partial power-down reset (PPD)
Low-voltage detect (LVD)
External pin reset (EXTR)
Computer operating properly loss of reference reset (COP_LOR)
Computer operating properly time-out reset (COP_CPU)
X:0xFF FF91–X:0xFF FF90
OBMSK (32 bits)
Breakpoint Unit Mask Register 2
X:0xFF FF8F
Reserved
X:0xFF FF8E
OBCNTR
EOnCE Breakpoint Unit Counter
X:0xFF FF8D
Reserved
X:0xFF FF8C
Reserved
X:0xFF FF8B
Reserved
X:0xFF FF8A
OESCR
External Signal Control Register
X:0xFF FF89 –X:0xFF FF00
Reserved
Table 13. EOnCE Memory Map
Address
Register Abbreviation
Register Name
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC56F8247 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Battery chargers and management |
| MC56F8247MLH | 功能描述:数字信号处理器和控制器 - DSP, DSC DSC 64 LQFP 48K FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| MC56F8247VLH | 功能描述:数字信号处理器和控制器 - DSP, DSC DSC 64 LQFP 48K FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| MC56F8247VLHR | 制造商:Freescale Semiconductor 功能描述:MICRO CONTROLLER |
| MC56F824X | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Battery chargers and management |
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