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参数资料
| 型号： | MC56F8246VLF |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 67/88页 |
| 文件大小： | 0K |
| 描述： | DSC 48K FLASH 60MHZ 48-LQFP |
| 标准包装： | 250 |
| 系列： | 56F8xxx |
| 核心处理器： | 56800E |
| 芯体尺寸： | 16-位 |
| 速度： | 60MHz |
| 连通性： | CAN，I²C，LIN，SCI，SPI |
| 外围设备： | LVD，POR，PWM，WDT |
| 输入/输出数： | 39 |
| 程序存储器容量： | 48KB（24K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 3K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 数据转换器： | A/D 10x12b，D/A 1x12b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 48-LQFP |
| 包装： | 管件 |
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Overview
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Freescale Semiconductor
7
— Maximum slave module frequency = module clock frequency/2
— 13-bit baud rate divider for low speed communication
Two inter-integrated circuit (I2C) ports
— Operation at up to 100 kbps
— Support for master and slave operation
— Support for 10-bit address mode and broadcasting mode
— Support for SMBus, Version 2
One Freescale Scalable Controller Area Network (MSCAN) module
— Fully compliant with CAN protocol Version 2.0 A/B
— Support for standard and extended data frames
— Support for data rate up to 1 Mbit/s
— Five receive buffers and three transmit buffers
Computer operating properly (COP) watchdog timer capable of selecting different clock sources
— Programmable prescaler and timeout period
— Programmable wait, stop, and partial powerdown mode operation
— Causes loss of reference reset 128 cycles after loss of reference clock to the PLL is detected
— Choice of clock sources from four sources in support of EN60730 and IEC61508:
– On-chip relaxation oscillator
– External crystal oscillator/external clock source
– System clock (IP bus to 60 MHz)
Power supervisor (PS)
— On-chip linear regulator for digital and analog circuitry to lower cost and reduce noise
— Integrated low voltage detection to generate warning interrupt if VDD is below low voltage detection (LVI)
threshold
— Integrated power-on reset (POR)
– Reliable reset process during power-on procedure
– POR is released after VDD passes low voltage detection (LVI) threshold
— Integrated brown-out reset
— Run, wait, and stop modes
Phase lock loop (PLL) providing a high-speed clock to the core and peripherals
— 2x system clock provided to Quad Timers and SCIs
— Loss of lock interrupt
— Loss of reference clock interrupt
Clock sources
— On-chip relaxation oscillator with two user selectable frequencies: 400 kHz for low speed mode, 8 MHz for
normal operation
— External clock: crystal oscillator, ceramic resonator, and external clock source
Cyclic Redundancy Check (CRC) Generator
— Hardware CRC generator circuit using 16-bit shift register
— CRC16-CCITT compliancy with x16 + x12 + x5 + 1 polynomial
— Error detection for all single, double, odd, and most multi-bit errors
— Programmable initial seed value
— High-speed hardware CRC calculation
— Optional feature to transpose input data and CRC result via transpose register, required on applications where
bytes are in LSb (Least Significant bit) format.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC56F8247 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Battery chargers and management |
| MC56F8247MLH | 功能描述:数字信号处理器和控制器 - DSP, DSC DSC 64 LQFP 48K FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| MC56F8247VLH | 功能描述:数字信号处理器和控制器 - DSP, DSC DSC 64 LQFP 48K FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| MC56F8247VLHR | 制造商:Freescale Semiconductor 功能描述:MICRO CONTROLLER |
| MC56F824X | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Battery chargers and management |
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