参数资料
型号: MC56F8246VLF
厂商: Freescale Semiconductor
文件页数: 78/88页
文件大小: 0K
描述: DSC 48K FLASH 60MHZ 48-LQFP
标准包装: 250
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 60MHz
连通性: CAN,I²C,LIN,SCI,SPI
外围设备: LVD,POR,PWM,WDT
输入/输出数: 39
程序存储器容量: 48KB(24K x 16)
程序存储器类型: 闪存
RAM 容量: 3K x 16
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 10x12b,D/A 1x12b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 48-LQFP
包装: 管件
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Overview
Freescale Semiconductor
8
Up to 54 general-purpose I/O (GPIO) pins
— 5 V tolerant I/O
— Individual control for each pin to be in peripheral or GPIO mode
— Individual input/output direction control for each pin in GPIO mode
— Individual control for each output pin to be in push-pull mode or open-drain mode
— Hysteresis and configurable pullup device on all input pins
— Ability to generate interrupt with programmable rising or falling edge and software interrupt
— Configurable drive strength: 4 mA / 8 mA sink/source current
JTAG/EOnCE debug programming interface for real-time debugging
— IEEE 1149.1 Joint Test Action Group (JTAG) interface
— EOnCE interface for real-time debugging
2.1.6
Power Saving Features
Low-speed run, wait, and stop modes: as low as 781 Hz clock provided by OCCS and internal ROSC
Large regulator standby mode available for reducing power consumption at low-speed mode
Less than 30 s typical wakeup time from stop modes
Each peripheral can be individually disabled to save power
2.2
Award-Winning Development Environment
Processor Expert (PE) provides a Rapid Application Design (RAD) tool that combines easy-to-use component-based software
application creation with an expert knowledge system.
The CodeWarrior Integrated Development Environment (IDE) is a sophisticated tool for code navigation, compiling, and
debugging. A complete set of evaluation modules (EVMs), demonstration board kit, and development system cards supports
concurrent engineering. Together, PE, CodeWarrior, and EVMs create a complete, scalable tools solution for easy, fast, and
efficient development.
2.3
Architecture Block Diagram
The MC56F825x/MC56F824x’s architecture appears in Figure 1 and Figure 2. Figure 1 illustrates how the 56800E system
buses communicate with internal memories and the IP bus interface as well as the internal connections among the units of the
56800E core.
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