参数资料
型号: MC56F8323VFBE
厂商: Freescale Semiconductor
文件页数: 123/140页
文件大小: 0K
描述: IC MPU HYBRID DSP 32K 64-LQFP
标准包装: 160
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 60MHz
连通性: CAN,SCI,SPI
外围设备: POR,PWM,温度传感器,WDT
输入/输出数: 27
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
RAM 容量: 12K x 8
电压 - 电源 (Vcc/Vdd): 2.25 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 64-LQFP
包装: 托盘
配用: MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
Introduction
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
83
Preliminary
Part 6 System Integration Module (SIM)
6.1 Introduction
The SIM module is a system catchall for the glue logic that ties together the system-on-chip. It controls
distribution of resets and clocks and provides a number of control features. The system integration module
is responsible for the following functions:
Reset sequencing
Clock control & distribution
Stop/Wait control
Pull-up enables for selected peripherals
System status registers
Registers for software access to the JTAG ID of the chip
Enforcing Flash security
These are discussed in more detail in the sections that follow.
6.2 Features
The SIM has the following features:
Flash security feature prevents unauthorized access to code/data contained in on-chip flash memory
Power-saving clock gating for peripherals
Three power modes (Run, Wait, Stop) to control power utilization
— Stop mode shuts down the 56800E core, system clock, and peripheral clock
— Stop mode entry can optionally disable PLL and Oscillator (low power vs. fast restart)
— Wait mode shuts down the 56800E core and unnecessary system clock operation
— Run mode supports full part operation
Controls to enable/disable the 56800E core WAIT and STOP instructions
Controls reset sequencing after reset
Software-initiated reset
Four 16-bit registers reset only by a Power-On Reset usable for general-purpose software control
System Control Register
Registers for software access to the JTAG ID of the chip
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