- 您现在的位置：买卖IC网 > PDF目录69027 > MC68HC05P9DWR2 (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 PDF资料下载
参数资料
| 型号： | MC68HC05P9DWR2 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封装： | SOIC-28 |
| 文件页数： | 38/88页 |
| 文件大小： | 6557K |
| 代理商： | MC68HC05P9DWR2 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页当前第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页
5
MC68HC05E0
MOTOROLA
5-1
MEMORY AND ADDRESSING
5
MEMORY AND ADDRESSING
5.1
Memory Map
As shown in Figure 5-1, the MC68HC05E0 is capable of addressing a full 65536 bytes of memory
and I/O using a non-multiplexed bus. The address space is divided into internal memory space
and external memory space as shown in the memory map. The internal memory space is located
within the rst 512 bytes of memory (pages 0 and 1) and contains the I/O port data and data
registers, all the timer, Serial Interface and wake-up control and data registers, and 480 bytes of
RAM. Program writes to on-chip locations are repeated on the external bus enabling off-chip
memory to duplicate the contents of on-chip memory. Program reads from on-chip locations also
appear on the external bus, but the CPU accepts data only from the addressed on-chip locations,
and ignores data appearing on the input bus.
5.2
RAM
480 bytes of on-chip static RAM are located from $0020 to $01FF. The processor stack starts at
$00FF and is limited to 64 bytes ($00C0 to $00FF). When the stack overows it wraps round from
$00C0 to $00FF, overwriting any existing data.
Note:
Using the stack area for data storage or as temporary work locations requires care to
prevent it from being overwritten due to stacking from an interrupt or subroutine call.
External RAM can be located from $0200 to $1FFF and accessed via the external data and
address buses. PD2 (Port D, bit 2) can be congured to output a chip select signal (CS2) which
can be used to select the external RAM, when an address in this range is present on the address
bus.
47
相关PDF资料 |
PDF描述 |
|---|---|
| MC68HC05RC18P | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28 |
| MC68HC05RC18FN | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC05SR3FB | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05SR3CFB | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05T7B | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC05P9P | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05PV8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Techinal Data - rev 1.9 |
| MC68HC05PV8A | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Techinal Data - rev 1.9 |
| MC68HC05RC16 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05RC16DW | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
发布紧急采购，3分钟左右您将得到回复。