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| 型号： | MCF54418CMJ250 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROPROCESSOR, PBGA256 |
| 封装： | 12 X 12 MM, ROHS COMPLAINT, MAPBGA-256 |
| 文件页数： | 32/60页 |
| 文件大小： | 1107K |
| 代理商： | MCF54418CMJ250 |
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MCF5441x ColdFire Microprocessor Data Sheet, Rev. 6
Preliminary—Subject to Change Without Notice
Electrical characteristics
Freescale Semiconductor
38
4.15.2
eSDHC electrical DC characteristics
Table 21 lists the eSDHC electrical DC characteristics.
4.16
SIM timing specifications
Each SIM card interface consist of a total of 12 pins (two separate ports of six pins each. Mostly one port with 5 pins is used).
The interface is meant to be used with synchronous SIM cards. This means that the SIM module provides a clock for the SIM
card to use. The frequency of this clock is normally 372 times the data rate on the TX/RX pins, however SIM module can work
with CLK equal to 16 times the data rate on TX/RX pins.
There is no timing relationship between the clock and the data. The clock that the SIM module provides to the SIM card is used
by the SIM card to recover the clock from the data, like a standard UART. All six (or five when a bidirectional TXRX is used)
of the pins for each half of the SIM module are asynchronous to each other. There are no required timing relationships between
the signals in normal mode. However, there are some in reset and power down sequences.
All SIM signals use pad type pad_msr. SIM timing is fairly relaxed compared to other interfaces and can be met at 50 pF loading
with any slew rate setting other than 00.1
Table 21. MMC/SD interface electrical specifications
Num
Parameter
Design
value
Min
Max
Unit
Condition/remark
Bus signal line load
7
Pull-up resistance
47
10
100
k
Internal PU
8
Open drain resistance
NA
k
For MMC cards only
Open drain signal level
For MMC cards only
9
Output high voltage
VDD – 0.2
V
IOH = –100 A
10
Output low voltage
0.3
V
IOL =2 mA
Bus signal levels
11
Output high voltage
0.75 x VDD
V
IOH = –100 A @VDD min
12
Output low voltage
0.125 x VDD
V
IOL =100 A @VDD min
13
Input high voltage
0.625 x VDD
VDD + 3
V
14
Input low voltage
VSS – 0.3
0.25 x VDD
V
1.These timing parameters are specified assuming maximum operating frequency and the fastest pad slew rate setting
(11). When operating this interface at lower frequencies, increase the slew rate by using the 10, 01, or 00 setting to
increase edge rise and fall times, thus reducing EMI.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCF54418CMJ250 | 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU COLDFIRE 250MHZ 256-MA |
| MCF5441X | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:MCF5441x ColdFire Microprocessor Data Sheet |
| MCF54450 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:ColdFire㈢ Microprocessor |
| MCF54450ACVM180 | 制造商:Freescale Semiconductor 功能描述:MCF5445X RISC 32-BIT 180MHZ 1.8V/2.5V/3.3V 256-PIN MA-BGA BR - Trays 制造商:Freescale Semiconductor 功能描述:MCF5445X V4M CORE, MMU, 制造商:Freescale 功能描述:MPU MCF5445X RISC 32-Bit 180MHz 1.8V/2.5V/3.3V 256-Pin MAP-BGA Brick |
| MCF54450AVM240 | 制造商:Freescale Semiconductor 功能描述:MCF5445X RISC 32-BIT 240MHZ 1.8V/2.5V/3.3V 256-PIN MA-BGA BR - Trays |
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