- 您现在的位置：买卖IC网 > PDF目录69032 > MCF54418CMJ250 (FREESCALE SEMICONDUCTOR INC) MICROPROCESSOR, PBGA256 PDF资料下载
参数资料
| 型号： | MCF54418CMJ250 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | MICROPROCESSOR, PBGA256 |
| 封装： | 12 X 12 MM, ROHS COMPLAINT, MAPBGA-256 |
| 文件页数： | 9/60页 |
| 文件大小： | 1107K |
| 代理商： | MCF54418CMJ250 |
第1页第2页第3页第4页第5页第6页第7页第8页当前第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
Pin assignments and reset states
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 6
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
17
VDDA_DAC_ADC
—
——
—
vddint
—
J4
VSSA_DAC_ADC
—
——
—
vssint
—
J5
VSTBY24
——
—
vddint
E14
E16
VSS
—
A1, A14,
D8, D14,
E8, F8, G4,
G8, G9,
G11, H4,
H8–11, J4,
J7, J11,
J14, K4–K6,
K11, P1,
P14
A1, A16,
D16, E8,
F7, F8,
G6–G11,
H6, H7,
H9–H11,
J6, J11,
J12, K12,
L4, L7–L12,
M5, M6, T1,
T16
1 All pins available with GPIO contain a configurable pull-up/down. This column indicates the pull devices that are enabled
automatically at reset. Pull-ups are generally only enabled on pins with their primary function, except as noted.
2 Refers to pin’s primary function.
3 For details on the available slew rates of the various pad types see section “Output Pad Loading and Slew Rate” of the MCF5441x
Data Sheet or section “Slew Rate Control Registers (SRCR_x)” in chapter “Pin-Multiplexing and Control” of the MCF5441x Reference
Manual.
4 This is tentative information — as of September 21, 2010 the 196 MAPBGA ball map has not yet been finalized.
5 Enabled as input only in oscillator bypass mode (internal crystal oscillator is disabled).
6 These pins are time-division multiplexed between the FlexBus and NFC. An arbitration mechanism determines which module drives
these pins at any point in time.
7 An internal pulldown circuit is enabled during system reset for FB_AD[10].
8 An internal pullup circuit is enabled when the system is in reset state.
9 Configurable pull that is enabled and pulled up after reset.
10 When configured for FB_A1, this pin is time-division multiplexed between the FlexBus and NFC. An arbitration mechanism
determines which module drives the pin at any point in time. When not configured as FB_A1, NFC_ALE cannot be used.
11 When configured for FB_A0, this pin is time-division multiplexed between the FlexBus and NFC. An arbitration mechanism
determines which module drives the pin at any point in time. When not configured as FB_A0, NFC_CLE cannot be used.
12 Since USB_CLKIN is a clock signal, it must be dedicated to the USB system. Do not implement this pin as dual-use.
13 When Alternate 2 is selected, then internal pullup/pulldown control will come from the MISCCR[3] register of CIM.
14 When booting from serial boot flash, the SBF function is enabled automatically. After the SBF function completes its reset sequence,
the signals are returned to GPIO functionality.
15 Automatic pull-up when SBF controls the pin during reset only. Configurable pull when UART, DSPI, or SDHC control the pin.
16 If ULPI is enabled, ULPI_DIR is available as the Alternate 2 function. If ULPI is disabled, USBO_VBUS_EN is available.
17 If ULPI is enabled, ULPI_NXT is available as the Alternate 2 function. If ULPI is disabled, USBO_VBUS_OC is available.
18 When Alternate 2 is selected, then internal pullup/pulldown control will come from the MISCCR[2] register of CIM.
19 UARTx_TXD pad can act as RXD(input) pad when UART One Wire mode is enabled.
20 These RMII functions are selected by the mode chosen by the MAC-NET, not by the pin-multiplexing and control (GPIO) module.
21 Configurable pull that is enabled and pulled down after reset.
Table 5. MCF5441x Signal information and muxing (continued)
Signal name
GPIO
Alternate 1
Alternate 2
Pu
llu
p
(U)
1
Pu
ll
d
o
wn
(D
)
Direc
tion
2
Vo
lt
a
g
e
d
o
m
a
in
Pa
d
t
y
p
e
3
19
6
MAPBGA
4
2
56
MAPBGA
相关PDF资料 |
PDF描述 |
|---|---|
| MCF54415CMJ250 | MICROPROCESSOR, PBGA256 |
| MCIMX251AJM4A | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400 |
| MCIMX255AJM4 | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400 |
| MCIMX251AVM4 | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400 |
| MCIMX27VOP4 | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA404 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MCF54418CMJ250 | 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU COLDFIRE 250MHZ 256-MA |
| MCF5441X | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:MCF5441x ColdFire Microprocessor Data Sheet |
| MCF54450 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:ColdFire㈢ Microprocessor |
| MCF54450ACVM180 | 制造商:Freescale Semiconductor 功能描述:MCF5445X RISC 32-BIT 180MHZ 1.8V/2.5V/3.3V 256-PIN MA-BGA BR - Trays 制造商:Freescale Semiconductor 功能描述:MCF5445X V4M CORE, MMU, 制造商:Freescale 功能描述:MPU MCF5445X RISC 32-Bit 180MHz 1.8V/2.5V/3.3V 256-Pin MAP-BGA Brick |
| MCF54450AVM240 | 制造商:Freescale Semiconductor 功能描述:MCF5445X RISC 32-BIT 240MHZ 1.8V/2.5V/3.3V 256-PIN MA-BGA BR - Trays |
发布紧急采购，3分钟左右您将得到回复。