参数资料
型号: MCIMX355AVM4B
厂商: Freescale Semiconductor
文件页数: 126/147页
文件大小: 0K
描述: IC MPU I.MX35 400MAPBGA
标准包装: 90
系列: i.MX35
核心处理器: ARM11
芯体尺寸: 32-位
速度: 400MHz
连通性: 1 线,CAN,EBI/EMI,以太网,I²C,MMC,SPI,SSI,UART/USART,USB OTG
外围设备: DMA,I²S,LCD,POR,PWM,WDT
输入/输出数: 96
程序存储器类型: ROMless
RAM 容量: 128K x 8
电压 - 电源 (Vcc/Vdd): 1.22 V ~ 1.47 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 400-LFBGA
包装: 托盘
i.MX35 Applications Processors for Automotive Products, Rev. 10
Freescale Semiconductor
8
ATA
ATA module
SDMA
Connectivity
peripherals
The ATA block is an AT attachment host interface. Its main use is to
interface with IDE hard disk drives and ATAPI optical disk drives. It
interfaces with the ATA device over a number of ATA signals.
AUDMUX
Digital audio
mux
ARM
Multimedia
peripherals
The AUDMUX is a programmable interconnect for voice, audio, and
synchronous data routing between host serial interfaces (SSIs) and
peripheral serial interfaces (audio codecs). The AUDMUX has two
sets of interfaces: internal ports to on-chip peripherals and external
ports to off-chip audio devices. Data is routed by configuring the
appropriate internal and external ports.
CAN(2)
CAN module
ARM
Connectivity
peripherals
The CAN protocol is primarily designed to be used as a vehicle
serial data bus running at 1 Mbps.
CCM
Clock control
module
ARM
Clocks
This block generates all clocks for the peripherals in the SDMA
platform. The CCM also manages ARM1136 platform low-power
modes (WAIT, STOP), disabling peripheral clocks appropriately for
power conservation, and provides alternate clock sources for the
ARM1136 and SDMA platforms.
CSPI(2)
Configurable
serial
peripheral
interface
SDMA,
ARM
Connectivity
peripherals
This module is a serial interface equipped with data FIFOs; each
master/slave-configurable SPI module is capable of interfacing to
both serial port interface master and slave devices. The CSPI ready
(SPI_RDY) and slave select (SS) control signals enable fast data
communication with fewer software interrupts.
ECT
Embedded
cross trigger
SDMA,
ARM
Debug
ECT (embedded cross trigger) is an IP for real-time debug
purposes. It is a programmable matrix allowing several subsystems
to interact with each other. ECT receives signals required for
debugging purposes (from cores, peripherals, buses, external
inputs, and so on) and propagates them (propagation programmed
through software) to the different debug resources available within
the SoC.
EMI
External
memory
interface
SDMA
External
memory
interface
The EMI module provides access to external memory for the ARM
and other masters. It is composed of the following main
submodules:
M3IF—provides arbitration between multiple masters requesting
access to the external memory.
SDRAM CTRL—interfaces to mDDR, DDR2 (4-bank architecture
type), and SDR interfaces.
NANDFC—provides an interface to NAND Flash memories.
WEIM—interfaces to NOR Flash and PSRAM.
EPIT(2)
Enhanced
periodic
interrupt timer
ARM
Timer
peripherals
Each EPIT is a 32-bit “set-and-forget” timer that starts counting after
the EPIT is enabled by software. It is capable of providing precise
interrupts at regular intervals with minimal processor intervention. It
has a 12-bit prescaler to adjust the input clock frequency to the
required time setting for the interrupts, and the counter value can be
programmed on the fly.
Table 4. Digital and Analog Modules (continued)
Block
Mnemonic
Block Name
Domain1
Subsystem
Brief Description
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