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参数资料
型号： MCIMX514AJM6C
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA529
封装： 19 X 19 MM, 0.8 MM PITCH, ROHS COMPLIANT, BGA-529
文件页数： 152/172页
文件大小： 2218K
代理商： MCIMX514AJM6C
i.MX51A Automotive and Infotainment Applications Processors, Rev. 4
80
Freescale Semiconductor
Electrical Characteristics
4.7.7
I2C Module Timing Parameters
This section describes the timing parameters of the I2C Module. Figure 48 depicts the timing of I2C
module, and Table 77 lists the I2C Module timing characteristics.
Figure 48. I2C Bus Timing
Table 77. I2C Module Timing Parameters
ID
Parameter
Standard Mode
Supply Voltage =
1.65 V–1.95 V, 2.7 V–3.3 V
Fast Mode
Supply Voltage =
2.7 V–3.3 V
Unit
Min
Max
Min
Max
IC1
I2CLK cycle time
10
—
2.5
—
s
IC2
Hold time (repeated) START condition
4.0
—
0.6
—
s
IC3
Set-up time for STOP condition
4.0
—
0.6
—
s
IC4
Data hold time
01
1 A device must internally provide a hold time of at least 300 ns for I2DAT signal in order to bridge the undefined region of the
falling edge of I2CLK.
3.452
2 The maximum hold time has only to be met if the device does not stretch the LOW period (ID no IC5) of the I2CLK signal
01
0.92
s
IC5
HIGH Period of I2CLK Clock
4.0
—
0.6
—
s
IC6
LOW Period of the I2CLK Clock
4.7
—
1.3
—
s
IC7
Set-up time for a repeated START condition
4.7
—
0.6
—
s
IC8
Data set-up time
250
—
1003
3 A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement of Set-up time (ID No IC7)
of 250 ns must be met. This automatically is the case if the device does not stretch the LOW period of the I2CLK signal.
If such a device does stretch the LOW period of the I2CLK signal, it must output the next data bit to the I2DAT line
max_rise_time (IC9) + data_setup_time (IC7) = 1000 + 250 = 1250 ns (according to the Standard-mode I2C-bus specification)
before the I2CLK line is released.
—ns
IC9
Bus free time between a STOP and START condition
4.7
—
1.3
—
s
IC10
Rise time of both I2DAT and I2CLK signals
—
1000
20 + 0.1Cb
4
4 C
b = total capacitance of one bus line in pF.
300
ns
IC11
Fall time of both I2DAT and I2CLK signals
—
300
20 + 0.1Cb
4
300
ns
IC12
Capacitive load for each bus line (Cb)
—
400
—
400
pF
IC10
IC11
IC9
IC2
IC8
IC4
IC7
IC3
IC6
IC10
IC5
IC11
START
STOP
START
I2DAT
I2CLK
IC1
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相关代理商/技术参数
参数描述
MCIMX514AJM6CR2 制造商:Freescale Semiconductor 功能描述:ELVIS 3.0 AUTO - Tape and Reel
MCIMX515CJM6C 功能描述:处理器 - 专门应用 iMX515 App Processor RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432
MCIMX515CJM6CR2 功能描述:处理器 - 专门应用 i.MX51 32bit 800 MHz RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432
MCIMX515DJM8C 功能描述:处理器 - 专门应用 iMX515 App Processor Extended Temp RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432
MCIMX515DJM8C 制造商:Freescale Semiconductor 功能描述:; LEADED PROCESS COMPATIBLE:YES; PEAK RE
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