参数资料
型号: MCZ33903BD5EK
厂商: Freescale Semiconductor
文件页数: 54/106页
文件大小: 0K
描述: IC SBC CAN HS 5.0V 32SOIC
标准包装: 42
应用: 系统基础芯片
接口: CAN,LIN
电源电压: 5.5 V ~ 28 V
封装/外壳: 32-SSOP(0.295",7.50mm 宽)裸露焊盘
供应商设备封装: 32-SOICW 裸露焊盘
包装: 管件
安装类型: 表面贴装
Analog Integrated Circuit Device Data
Freescale Semiconductor
51
33903/4/5
FAIL-SAFE OPERATION
BEHAVIOR AT POWER UP AND POWER DOWN
FAIL-SAFE OPERATION
OVERVIEW
Fail-safe mode is entered when specific fail conditions
occur. The “Safe state” condition is defined by the resistor
connected at the DGB pin. Safe mode is entered after
additional event or conditions are met: time out for CAN
communication and state at I/O-1 pin.
Exiting the safe state is always possible by a Wake-up
event: in the safe state, the device can automatically be
awakened by CAN and I/O (if configured as inputs). Upon
Wake-up, the device operation is resumed: enter in Reset
mode.
FAIL-SAFE FUNCTIONALITY
Upon dedicated event or issue detected at a device pin
(i.e. RST short to VDD), the Safe mode can be entered. In
this mode, the SAFE pin is active low.
Description
Upon activation of the SAFE pin, and if the failure
condition that make the SAFE pin activated have not
recovered, the device can help to reduce ECU consumption,
assuming that the MCU is not able to set the whole ECU in LP
mode. Two main cases are available:
Mode A
Upon SAFE activation, the MCU remains powered (VDD
stays ON), until the failure condition recovers (i.e. S/W is able
to properly control the device and properly refresh the
watchdog).
Modes B1, B2 and B3
Upon SAFE activation, the system continues to monitor
external event, and disable the MCU supply (turn VDD OFF).
The external events monitored are: CAN traffic, I/O-1 low
level or both of them. 3 sub cases exist, B1, B2 and B3.
Note: no CAN traffic indicates that the ECU of the vehicle
are no longer active, thus that the car is being parked and
stopped. The I/O low level detection can also indicate that the
vehicle is being shutdown, if the I/O-1 pin is connected for
instance to a switched battery signal (ignition key on/off
signal).
The selection of the monitored events is done by
hardware, via the resistor connected at DBG pin, but can be
over written by software, via a specific SPI command.
By default, after power up the device detect the resistor
value at DBG pin (upon transition from INIT to Normal mode),
and, if no specific SPI command related to Debug resistor
change is send, operates according to the detected resistor.
The INIT MISC register allow you to verify and change the
device behavior, to either confirm or change the hardware
selected behavior. Device will then operate according to the
SAFE mode configured by the SPI.
Table 9 illustrates the complete options available:
Exit of Safe Mode
Exit of the safe state with VDD OFF is always possible by
a Wake-up event: in this safe state the device can
automatically awakened by CAN and I/O (if I/O Wake-up was
enable by the SPI prior to enter into SAFE mode). Upon
Wake-up, the device operation is resumed, and device enters
in Reset mode. The SAFE pin remains active, until there is a
proper read and clear of the SPI flags reporting the SAFE
conditions.
Table 9. Fail-safe Options
Resistor at
DBG pin
SPI coding - register INIT MISC bits [2,1,0]
(higher priority that Resistor coding)
Safe mode
code
VDD status
<6.0 k
bits [2,1,0) = [111]: verification enable: resistor at DBG pin is typically
0 kohm (RA) - Selection of SAFE mode A
A
remains ON
typically 15 k bits [2,1,0) = [110]: verification enable: resistor at DBG pin is typically
15 kohm (RB1) - Selection of SAFE mode B1
B1
Turn OFF 8.0 s after CAN traffic bus idle detection.
typically 33 k bits [2,1,0) = [101]: verification enable: resistor at DBG pin is typically
33 kohm (RB2 - Selection of SAFE mode B2
B2
Turn OFF when I/O-1 low level detected.
typically 68 k bits [2,1,0) = [100]: verification enable: resistor at DBG pin is typically
68 kohm (RB3) - Selection of SAFE mode B3
B3
Turn OFF 8.0 s after CAN traffic bus idle detection
AND when I/O-1 low level detected.
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