参数资料
型号: ML9041-XXBCVWA
厂商: LAPIS SEMICONDUCTOR CO LTD
元件分类: 显示控制器
英文描述: 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175
封装: 10.62 X 2.55 MM, GOLD BUMP, DIE-175
文件页数: 2/61页
文件大小: 572K
代理商: ML9041-XXBCVWA
PEDL9041-03
1Semiconductor
ML9041-xxA/xxB
9/60
(GND = 0 V, V
DD = 2.5 to 5.5 V, Ta = –40 to +85°C)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Applicable
pins
V
LCD
MAX
V
DD = 5 V, 1/5 bias
V
5IN = 0 V,
Contrast data: 1F
4.6
V
DD–V5
Maximum and
minimum LCD
drive voltages
when internal
variable resistors
are used.
V
LCD
MIN
V
DD = 5 V, 1/5 bias
V
5IN = 0 V,
Contrast data: 00
—3.4
V
LCD1
1/5 bias
2.8
7.0
V
5
Bias Voltage for
Driving LCD by
External Input
V
LCD2
V
DD–V5
Note 7
1/4 bias
2.8
7.0
Voltage Multiplier
Output Voltage
V
5OUT
V
DD = 3 V, VIN = 0 V
f = 270 kHz
A capacitor for the voltage
multiplier = 4.7
F
No load
BEB = H
V
DD–(VDD–VIN)
× 2–0.1
V
DD–(VDD
V
IN) × 2+1.2 V
VV
5, V5IN
Voltage Multiplier
Input Voltage
V
IN
V
DD–3.5 V
V
DD/2
V
IN
Note 1:
Applied to the voltage drop occurring between any of the V
DD, V1, V4 and V5 pins and any of the
common pins (COM
1 to COM17) when the current of 4 A flows in or flows out at one common
pin.
Also applied to the voltage drop occurring between any of the V
DD, V2, V3A (V3B) and V5 pins and
any of the segment pins (SEG
1 to SEG100) when the current of 4 A flows in or flows out at one
common pin.
The current of 4
A flows out when the output level is V
DD or flows in when the output level is
V
5.
Note 2:
Applied to the current flowing into the V
DD pin when the external clock (fOSC2 = fin = 270 kHz) is
fed to the internal R
f oscillation or OSC1 under the following conditions:
V
DD = 5 V
GND = V
5 = 0 V,
V
1, V2, V3A (V3B) and V4: Open
E, SSR, CSR, and BEB: “L” (fixed)
Other input pins: “L” or “H” (fixed)
Other output pins: No load
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