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参数资料
| 型号： | ML9041-XXBCVWA |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 显示控制器 |
| 英文描述： | 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175 |
| 封装： | 10.62 X 2.55 MM, GOLD BUMP, DIE-175 |
| 文件页数： | 36/61页 |
| 文件大小： | 572K |
| 代理商： | ML9041-XXBCVWA |
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PEDL9041-03
1Semiconductor
ML9041-xxA/xxB
40/60
3) Contrast Adjusting Data Read
RS1
0
RS0
0
R/W
1
DB7
0
DB6
0
DB5
0
DB4
G4
DB3
G3
DB2
G2
DB1
G1
DB0
G0
Expansion instruction code:
This instruction reads contrast adjusting data (G
4 to G0) from the contrast register.
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
4) ABRAM Address Setting
RS1
0
RS0
0
R/W
1
DB7
0
DB6
1
DB5
1
DB4
H4
DB3
H3
DB2
H2
DB1
H1
DB0
H0
Expansion instruction code:
This instruction sets the character data corresponding to the ABRAM address represented by the bits H
4 to H0
(binary).
The ABRAM addresses are valid until CGRAM or DDRAM addresses are set.
The CPU writes or reads character patterns starting from the one represented by the ABRAM address bits H
4 to
H
0 set in the instruction code at that time.
The ABRAM address represented by bits H
4 to H0 (binary) should be in the range “00” to “13” in hexadecimal.
If an address other than above is input, the ML9041 cannot properly write a character code in or read it from the
DDRAM.
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
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相关代理商/技术参数 |
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