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参数资料
| 型号： | ML9041-XXBCVWA |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 显示控制器 |
| 英文描述： | 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175 |
| 封装： | 10.62 X 2.55 MM, GOLD BUMP, DIE-175 |
| 文件页数： | 28/61页 |
| 文件大小： | 572K |
| 代理商： | ML9041-XXBCVWA |
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PEDL9041-03
1Semiconductor
ML9041-xxA/xxB
33/60
Instruction Codes
Table of Instruction Codes
Code
Instruction
RS1 RS0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Function
Execution
Time
f = 270 kHz
Display Clear
1
0
1
Clears all the displayed digits of the
LCD and sets the DDRAM address 0 in
the address counter. The arbitrator
data is cleared.
1.52 ms
Cursor Home
1
0
1
X
Sets the DDRAM address 0 in the
address counter and shifts the display
back to the original. The content of the
DDRAM remains unchanged.
1.52 ms
Entry Mode
Setting
1
0
1
I/D
S
Determines the direction of movement
of the cursor and whether or not to shift
the display. This instruction is
executed when data is written or read.
37
s
Display
ON/OFF Control
10
0
1
D
C
B
Sets LCD display ON/OFF (D), cursor
ON/OFF or cursor-position character
blinking ON/OFF.
37
s
Cursor/Display
Shift
10
0
1
S/C R/L
X
Moves the cursor or shifts the display
without changing the content of the
DDRAM.
37
s
Function Setting
1
0
1
DL
N
F
X
Sets the interface data length (DL), the
number of display lines (N) or the type
of character font (F).
37
s
CGRAM
Address Setting
10
0
1
ACG
Sets on CGRAM address. After that,
CGRAM data is transferred to and from
the CPU.
37
s
DDRAM
Address Setting
10
0
1
ADD
Sets a DDRAM address. After that,
DDRAM data is transferred to and from
the CPU.
37
s
Busy Flag/
Address Read
10
1
BF
ADC
Reads the Busy Flag (indicating that
the ML9041 is operating) and the
content of the address counter.
0
s
RAM Data Write
1
0
WRITE DATA
Writes data in DDRAM, ABRAM or
CGRAM.
37
s
RAM Data Read
1
READ DATA
Reads data from DDRAM, ABRAM or
CGRAM.
37
s
Arbitrator
Display Line Set
0
1
AS Sets the arbitrator display line.
37
s
Contrast Control
Data Write
00
0
1
WRITE (Contrast Data)
DATA
Writes data to control the contrast of
the LCD.
37
s
Contrast Control
Data Read
00
1
0
READ (Contrast Data)
DATA
Reads data to control the contrast of
the LCD.
37
s
ABRAM
Address Setting
00
0
1
AAB
Sets an ABRAM address. After that,
ABRAM data is transferred to and from
the CPU.
37
s
—
I/D = “1” (Increment)
I/D = “0” (Decrement)
S = “1”
(Shifts the display.)
S/C = “1” (Shifts display.)
S/C = “0” (Moves the cursor.)
R/L = “1” (Right shift)
R/L = “0” (Left shift)
D/L = “1” (8-bit data)
DL = “0” (4-bit data)
N = “1”
(2 lines)
N = “0”
(1 line)
F = “1”
(5 x 10 dots)
F = “0”
(5 x 7 dots)
BF = “1” (Busy)
BF = “0” (Ready to accept
an instruction)
B = “1”
(Enables blinking)
C = “1”
(Displays the cursor.)
D = “1”
(Displays a character pattern.)
AS = “1” (Arbitrator Displays AS = “0” (Arbitrator Displays
arbitrator on the
upper line)
lower line)
DD RAM: Display data RAM
CG RAM: Character generator RAM
ABRAM: Arbitrator data RAM
ACG:
CGRAM address
ADD:
DDRAM address
(Corresponds to the cursor
address)
AAB:
ABRAM address
ADC:
Address counter (Used by
DDRAM, ABRAM and
CGRAM)
The
execution
time is
dependent
upon
frequen-
cies.
×: Don't Care
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