参数资料
型号: MM908E621
厂商: 飞思卡尔半导体(中国)有限公司
英文描述: Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror
中文描述: 综合四半桥和三高的嵌入式微控制器和LIN高端侧镜
文件页数: 30/62页
文件大小: 719K
代理商: MM908E621
Analog Integrated Circuit Device Data
36
Freescale Semiconductor
908E621
Functional Device Operation
Operational Modes
Wake-up input L0
The device provides one wake-up capable input for
reading VSUP or VDD related signals.
RUN mode
The actual input state is reflected in bit L0F of the H0/L0
Status and Control register (HLSCTL).
The L0 terminal offers an interrupt capability on rising and
falling edge. The interrupt can be enabled with the L0IE bit in
the Interrupt Mask register.
STOP/SLEEP mode
During STOP and SLEEP mode the terminal can be used
to wake-up the device.
Before entering the STOP or SLEEP mode the actual state
of the input is stored. If the state is changing during in the
STOP or SLEEP mode a wake-up is initiated.
H0 / L0 Status and Control Register (HLSCTL)
L0F — L0 Flag Bit
This read only flag reflects the state of the L0 input
1 = L0 input high
0 = L0 input low
H0OCF — H0 Overcurrent Flag Bit
This read/write flag is set at overcurrent condition on H0
during 2pin hallsensor mode. Clear H0OCF by writing a
logic [1] to H0OCF.
Reset clears the H0OCF bit.
1 = overcurrent condition on H0 terminal has occurred
0 = no overcurrent condition on H0 terminal has
occurred
H0F — H0 Flag Bit
This read only flag reflects the state of the H0 input
1 = Hallport sensed high / current below threshold
detected
0 = Hallport sensed low / current above threshold
detected
H0EN — H0 Input 2pin Hall-effect sensor Enable Bit
This read/write bit enables the 2pin hall-effect sensor
sense circuitry.
Reset clears H0EN bit.
1 = Hallport H0 is switched on and sensed
0 = Hallport H0 disabled
H0PD — Hallport Pull-up Disable Bit
This read/write bit disables the H0 Pull-up resistor.
Reset clears H0PD bit.
1 = Hallport Pull-up resistor on H0 disabled
0 = Hallport Pull-up resistor on H0 enabled
H0MS — H0 Mode Select
These read/write bits select the mode of the H0 input
Reset clears H0MS bit.
1 = H0 is 2-pin hallsensor input
0 = H0 is general purpose input
Half-Bridge Outputs
Outputs HB1:HB4 provide four low-resistive half-bridge
output stages. The half-bridges can be used in H-Bridge,
high-side or low-side configurations.
Reset clears all bits in the H-Bridge Output Register
(HBOUT) owing to the fact that all half-bridge outputs are
switched off.
HB1:HB4 output features
Short circuit (overcurrent) protection on high-side and
low-side MOSFETs
Current recopy feature (low-side MOSFET)
Overtemperature protection
Overvoltage and undervoltage protection
Active clamp on low-side MOSFET
Register Name and Address: HLSCTL - $07
Bit7
6
5
4
3
2
1
Bit0
Read
L0F
0
H0OCF
H0F
H0EN
H0PD
H0MS
Write
Reset
0
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