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参数资料
| 型号： | MMDF5N02ZR2 |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 小信号晶体管 |
| 英文描述： | 5000 mA, 20 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封装： | SO-8 |
| 文件页数： | 7/12页 |
| 文件大小： | 123K |
| 代理商： | MMDF5N02ZR2 |
MMDF5N02Z
http://onsemi.com
4
POWER MOSFET SWITCHING
Switching behavior is most easily modeled and predicted
by recognizing that the power MOSFET is charge con-
trolled. The lengths of various switching intervals (
t) are
determined by how fast the FET input capacitance can be
charged by current from the generator.
The published capacitance data is difficult to use for calcu-
lating rise and fall because draingate capacitance varies
greatly with applied voltage. Accordingly, gate charge data
is used. In most cases, a satisfactory estimate of average in-
put current (IG(AV)) can be made from a rudimentary analy-
sis of the drive circuit so that
t = Q/IG(AV)
During the rise and fall time interval when switching a resis-
tive load, VGS remains virtually constant at a level known as
the plateau voltage, VSGP. Therefore, rise and fall times may
be approximated by the following:
tr = Q2 x RG/(VGG VGSP)
tf = Q2 x RG/VGSP
where
VGG = the gate drive voltage, which varies from zero to VGG
RG = the gate drive resistance
and Q2 and VGSP are read from the gate charge curve.
During the turnon and turnoff delay times, gate current is
not constant. The simplest calculation uses appropriate val-
ues from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:
td(on) = RG Ciss In [VGG/(VGG VGSP)]
td(off) = RG Ciss In (VGG/VGSP)
The capacitance (Ciss) is read from the capacitance curve at
a voltage corresponding to the offstate condition when cal-
culating td(on) and is read at a voltage corresponding to the
onstate when calculating td(off).
At high switching speeds, parasitic circuit elements com-
plicate the analysis. The inductance of the MOSFET source
lead, inside the package and in the circuit wiring which is
common to both the drain and gate current paths, produces
a voltage at the source which reduces the gate drive current.
The voltage is determined by Ldi/dt, but since di/dt is a func-
tion of drain current, the mathematical solution is complex.
The MOSFET output capacitance also complicates the
mathematics. And finally, MOSFETs have finite internal
gate resistance which effectively adds to the resistance of the
driving source, but the internal resistance is difficult to mea-
sure and, consequently, is not specified.
The resistive switching time variation versus gate resis-
tance (Figure 9) shows how typical switching performance
is affected by the parasitic circuit elements. If the parasitics
were not present, the slope of the curves would maintain a
value of unity regardless of the switching speed. The circuit
used to obtain the data is constructed to minimize common
inductance in the drain and gate circuit loops and is believed
readily achievable with board mounted components. Most
power electronic loads are inductive; the data in the figure
is taken with a resistive load, which approximates an opti-
mally snubbed inductive load. Power MOSFETs may be
safely operated into an inductive load; however, snubbing
reduces switching losses.
Figure 7. Capacitance Variation
C,
CAP
ACIT
ANCE
(pF)
GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (VOLTS)
5
10
TJ = 25°C
VGS = 0 V
600
400
200
0
15
Ciss
Coss
Crss
0
800
1000
20
10
1200
1400
VDS = 0 V
Ciss
Crss
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相关代理商/技术参数 |
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|---|---|
| MMDF6N02HD | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:DUAL TMOS POWER MOSFET 6.0 AMPERES 20 VOLTS |
| MMDF6N02HDR2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
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