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参数资料
型号： MPC8241LZQ166X
厂商： MOTOROLA INC
元件分类： 微控制器/微处理器
英文描述： 32-BIT, 166 MHz, RISC PROCESSOR, PBGA357
封装： 25 X 25 MM, 1.27 MM PITCH, PLASTIC, BGA-357
文件页数： 4/60页
文件大小： 752K
代理商： MPC8241LZQ166X
12
MPC8241 Integrated Processor Hardware Specifications
MOTOROLA
Electrical and Thermal Characteristics
1.4.1.5
Power Characteristics
Table 5 provides preliminary estimated power consumption data for the MPC8241.
Table 5. Preliminary Power Consumption
Mode
PCI Bus Clock/Memory Bus Clock
CPU Clock Frequency (MHz)
Unit
Notes
33/66/
133
33/66/
166
33/66/
200
33/100/
200
66/100/
200
66/66/
266
66/133/
266
Typical
0.7
0.8
1.0
1.5
1.8
W
1, 5
Max—CFP
0.8
1.0
1.2
1.3
1.9
2.1
W
1, 2
Max—INT
0.8
0.9
1.0
1.2
1.6
1.8
W
1, 3
Doze
0.5
0.6
0.7
0.8
1.0
1.3
W
1, 4, 6
Nap
0.2
0.3
0.4
0.7
W
1, 4, 6
Sleep
0.2
0.3
0.2
0.4
W
1, 4, 6
I/O Power Supplies 7
Mode
Minimum
Maximum
Unit
Notes
GVDD_OVDD
500
1100
mW
8
Notes:
1. The values include VDD, AVDD, and AVDD2 but do not include I/O supply power, see Section 1.7.2, “Power Supply
Sizing,” for information on GVDD_OVDD supply power.
2. Maximum—FP power is measured at VDD = 1.9 V with dynamic power management enabled while running an
entirely cache-resident, looping, floating-point multiplication instruction.
3. Maximum—INT power is measured at VDD = 1.9 V with dynamic power management enabled while running entirely
cache-resident, looping, integer instructions.
4. Power saving mode maximums are measured at VDD = 1.9 V while the device is in doze, nap, or sleep mode.
5. Typical power is measured at VDD = AVDD = 1.8 V, GVDD_OVDD = 3.3 V where a nominal FP value, a nominal INT
value, and a value where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit
boundaries to local memory are averaged.
6. Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled.
7. Power consumption of PLL supply pins (AVDD and AVDD2) < 15 mW, guaranteed by design, but not tested.
8. The typical maximum GVDD_OVDD value resulted from the MPC8241 operating at the fastest frequency
combination of 66:100:200 (PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating
ones and zeros to PCI memory and on 64-bit boundaries to local memory.
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相关代理商/技术参数
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