参数资料
型号: MPC8306CVMADDCA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA369
封装: 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-369
文件页数: 75/76页
文件大小: 474K
代理商: MPC8306CVMADDCA
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
8
Freescale Semiconductor
Electrical Characteristics
2.1.2
Power Supply Voltage Specification
Table 2 provides the recommended operating conditions for the MPC8306. Note that these values are the
recommended and tested operating conditions. Proper device operation outside of these conditions is not
guaranteed.
Figure 2 shows the undershoot and overshoot voltages at the interfaces of the MPC8306
Figure 2. Overshoot/Undershoot Voltage for GVDD/OVDD
Table 2. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value
Unit
Notes
Core supply voltage
VDD
1.0 V ± 50 mV
V
1
PLL supply voltage
AVDD1
AVDD2
AVDD3
1.0 V ± 50 mV
V
1
DDR2 DRAM I/O voltage
GVDD
1.8 V ± 100 mV
V
1
Local bus, DUART, system control and power management, I2C,
SPI, MII, RMII, MII management, eSDHC, FlexCAN, USB and
JTAG I/O voltage
OVDD
3.3 V ± 300 mV
V
1, 3
Junction temperature
TA/TJ
0to105
C2
Note:
1. GVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or negative
direction.
2. Minimum temperature is specified with TA(Ambient Temperature); maximum temperature is specified with TJ(Junction
Temperature).
3. OVDD here refers to NVDDA, NVDDB,NVDDC, NVDDF, NVDDG, and NVDDH from the ball map.
GND
GND – 0.3 V
GND – 0.7 V
Not to Exceed 10%
G/OVDD + 20%
G/OVDD
G/OVDD + 5%
of tinterface1
1. tinterface refers to the clock period associated with the bus clock interface.
VIH
VIL
Note:
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