MPC8377E-RDBA (Freescale) PDF资料下载 Datasheet(109/127 页)

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型号：	MPC8377E-RDBA
厂商：	Freescale Semiconductor
文件页数：	109/127页
文件大小：	0K
描述：	BOARD REF DES MPC8377 REV 2.1
设计资源：	MPC8379E-RDB Ref Design Guide
标准包装：	1
系列：	PowerQUICC II™ PRO
类型：	MPU
适用于相关产品：	MPC8377E
所含物品：	板，CD
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MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

greater than 200 mV. This requirement is the same for both external DC-coupled or

AC-coupled connection.

— For external DC-coupled connection, as described in Section 21.2.1, “SerDes Reference

Clock Receiver Characteristics,” the maximum average current requirements sets the

requirement for average voltage (common mode voltage) to be between 100 mV and 400 mV.

Figure 53 shows the SerDes reference clock input requirement for DC-coupled connection

scheme.

— For external AC-coupled connection, there is no common mode voltage requirement for the

clock driver. Since the external AC-coupling capacitor blocks the DC level, the clock driver

and the SerDes reference clock receiver operate in different command mode voltages. The

SerDes reference clock receiver in this connection scheme has its common mode voltage set to

SGND_SRDSn. Each signal wire of the differential inputs is allowed to swing below and above

the command mode voltage (SGND_SRDSn). Figure 54 shows the SerDes reference clock

input requirement for AC-coupled connection scheme.

Single-ended Mode

— The reference clock can also be single-ended. The SD _REF_CLK input amplitude

(single-ended swing) must be between 400 mV and 800 mVp-p (from Vmin to Vmax) with

SDn_REF_CLK either left unconnected or tied to ground.

—The SDn_REF_CLK input average voltage must be between 200 mV and 400 mV. Figure 55

shows the SerDes reference clock input requirement for single-ended signaling mode.

— To meet the input amplitude requirement, the reference clock inputs might need to be DC or

AC-coupled externally. For the best noise performance, the reference of the clock could be DC

or AC-coupled into the unused phase (SDn_REF_CLK) through the same source impedance as

the clock input (SDn_REF_CLK) in use.

Figure 53. Differential Reference Clock Input DC Requirements (External DC-Coupled)

n_REF_CLK

Vmax < 800 mV

Vmin > 0 V

100 mV < Vcm < 400 mV

200 mV < Input Amplitude or Differential Peak < 800 mV

相关代理商/技术参数	参数描述
MPC8377E-RDBA	制造商:Freescale Semiconductor 功能描述:MPC837x Family Reference Desig
MPC8377EVRAFDA	制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAFFA	制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAFGA	制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAGD	功能描述:微处理器 - MPU PBGA W/ ENCR RoHS:否制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324

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