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参数资料
| 型号： | MSC8101VT1250F |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 64-BIT, 62.5 MHz, OTHER DSP, PBGA332 |
| 封装： | 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332 |
| 文件页数： | 83/104页 |
| 文件大小： | 1811K |
| 代理商： | MSC8101VT1250F |
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MSC8101 Technical Data, Rev. 18
1-4
Freescale Semiconductor
Signals/Connections
1.1 Power Signals
1.2 Clock Signals
Table 1-2.
Power and Ground Signal Inputs
Power Name
Description
VDD
Internal Logic Power
VDD dedicated for use with the device core. The voltage should be well-regulated and the input should be provided with
an extremely low impedance path to the VDD power rail.
VDDH
Input/Output Power
This source supplies power for the I/O buffers. The user must provide adequate external decoupling capacitors.
VCCSYN
System PLL Power
VCC dedicated for use with the system Phase Lock Loop (PLL). The voltage should be well-regulated and the input
should be provided with an extremely low impedance path to the VCC power rail.
VCCSYN1
SC140 PLL Power
VCC dedicated for use with the SC140 core PLL. The voltage should be well-regulated and the input should be provided
with an extremely low impedance path to the VCC power rail.
GND
System Ground
An isolated ground for the internal processing logic. This connection must be tied externally to all chip ground
connections, except GNDSYN and GNDSYN1. The user must provide adequate external decoupling capacitors.
GNDSYN
System PLL Ground
Ground dedicated for system PLL use. The connection should be provided with an extremely low-impedance path to
ground.
GNDSYN1
SC140 PLL Ground 1
Ground dedicated for SC140 core PLL use. The connection should be provided with an extremely low-impedance path
to ground.
Table 1-3.
Clock Signals
Signal Name
Type
Signal Description
CLKIN
Input
Clock In
Primary clock input to the MSC8101 PLL.
MODCK1
TC0
BNKSEL0
Input
Output
Clock Mode Input 1
Defines the operating mode of internal clock circuits.
Transfer Code 0
Supplies information that can be useful for debugging bus transactions initiated by the MSC8101.
Bank Select 0
Selects the SDRAM bank when the MSC8101 is in 60x-compatible bus mode.
MODCK2
TC1
BNKSEL1
Input
Output
Clock Mode Input 2
Defines the operating mode of internal clock circuits.
Transfer Code 1
Supplies information that can be useful for debugging bus transactions initiated by the MSC8101.
Bank Select 1
Selects the SDRAM bank when the MSC8101 is in 60x-compatible bus mode.
MODCK3
TC2
BNKSEL2
Input
Output
Clock Mode Input 3
Defines the operating mode of internal clock circuits.
Transfer Code 2
Supplies information that can be useful for debugging bus transactions initiated by the MSC8101.
Bank Select 2
Selects the SDRAM bank when the MSC8101 is in 60x-compatible bus mode.
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相关代理商/技术参数 |
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| MSC8101VT1375F | 功能描述:IC DSP 16BIT 250MHZ 332-FCPBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:StarCore 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| MSC8101VT1500F | 功能描述:IC DSP 16BIT 250MHZ 332-FCPBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:StarCore 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| MSC8102 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Quad Core 16-Bit Digital Signal Processor |
| MSC81020 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS |
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