参数资料
型号: MSC8144VT1000B
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 数字信号处理
英文描述: 133 MHz, OTHER DSP, PBGA783
封装: 29 X 29 MM, LEAD FREE, PLASTIC, FCPBGA-783
文件页数: 71/80页
文件大小: 1250K
代理商: MSC8144VT1000B
Hardware Design Considerations
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
73
3.4.4.3
GE1 and GE2 Management Pins
GE_MDC and GE_MDIO pins should be connected as required by the specified protocol. If neither GE1 nor GE2 is used (that
is, VDDGE2 is connected to GND), Table 61 lists the recommended management pin connections.
3.4.5
UTOPIA/POS Related Pins
Table 62 lists the board connections of the UTOPIA/POS pins when the entire UTOPIA/POS interface is not used or subset of
UTOPIA/POS interface is used. For multiplexing options that select a subset of the UTOPIA/POS interface, use the connections
described in Table 62 for those signals that are not selected. Table 62 assumes that the alternate function of the specified pin is
not used. If the alternate function is used, connect that pin as required to support the selected function.
GE2_SGMII_RX
GNDSXC
GE2_SGMII_TX
NC
GE2_SGMII_TX
NC
GE2_TCK
NC
GE2_TD[0–3]
NC
GE2_TX_EN
NC
Table 61. Connectivity of GE Management Pins When GE1 and GE2 Are Not Used
Signal Name
Pin Connection
GE_MDC
NC
GE_MDIO
NC
Table 62. Connectivity of UTOPIA/POS Related Pins When UTOPIA/POS Interface Is Not Used
Signal Name
Pin Connection
UTP_IR
GND
UTP_RADDR[0–4]
VDDIO
UTP_RCLAV_PDRPA
NC
UTP_RCLK
GND
UTP_RD[0–15]
GND
UTP_REN
VDDIO
UTP_RPRTY
GND
UTP_RSOC
GND
UTP_TADDR[0–4]
VDDIO
UTP_TCLAV
NC
UTP_TCLK
GND
UTP_TD[0–15]
NC
UTP_TEN
VDDIO
UTP_TPRTY
NC
UTP_TSOC
NC
VDDIO
3.3 V
Table 60. Connectivity of GE1 Related Pins When only a subset of the GE1 Interface Is required (continued)
Signal Name
Pin Connection
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