参数资料
型号: MSP430F2370TRHAR
厂商: Texas Instruments
文件页数: 3/65页
文件大小: 0K
描述: IC MCU 16BIT 32K FLASH 40-QFN
产品培训模块: The Ultra-Low Power MSP430
MSP430 Overview
MSP430 Design Tools
MSP430 Peripherals
MSP430x2xx/4xx and Wireless Overview
Portable Medical Solutions with MSP430
MSP430 for Utility Metering Solutions
MSP430: How to JTAG
MSP430, How To Use the Clock System
Grace Software Graphical User Interface
MCU Overview
Driver Library
MSP430Ware Overview
标准包装: 2,500
系列: MSP430F2xx
核心处理器: RISC
芯体尺寸: 16-位
速度: 16MHz
连通性: I²C,IrDA,LIN,SCI,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 32KB(32K x 8 + 256B)
程序存储器类型: 闪存
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 3.6 V
数据转换器: 斜率 A/D
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 40-VFQFN 裸露焊盘
包装: 带卷 (TR)
配用: 296-23115-ND - TOOL FLASH EMU MSP430 40PIN RHA
MSP430F23x0
SLAS518E
– AUGUST 2006 – REVISED AUGUST 2011
Special Function Registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
not allocated to a functional purpose are not physically present in the device. Simple software access is provided
with this arrangement.
Legend
rw
Bit can be read and written.
rw-0, 1
Bit can be read and written. It is Reset or Set by PUC.
rw-(0), (1)
Bit can be read and written. It is Reset or Set by POR.
SFR bit is not present in device.
Table 7. Interrupt Enable 1
Address
7
6
5
4
3
2
1
0
00h
ACCVIE
NMIIE
OFIE
WDTIE
rw-0
WDTIE
Watchdog timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer is configured in interval
timer mode.
OFIE
Oscillator fault interrupt enable
NMIIE
(Non)maskable interrupt enable
ACCVIE
Flash access violation interrupt enable
Table 8. Interrupt Enable 2
Address
7
6
5
4
3
2
1
0
01h
UCB0TXIE
UCB0RXIE
UCA0TXIE
UCA0RXIE
rw-0
UCA0RXIE
USCI_A0 receive-interrupt enable
UCA0TXIE
USCI_A0 transmit-interrupt enable
UCB0RXIE
USCI_B0 receive-interrupt enable
UCB0TXIE
USCI_B0 transmit-interrupt enable
Table 9. Interrupt Flag Register 1
Address
7
6
5
4
3
2
1
0
02h
NMIIFG
RSTIFG
PORIFG
OFIFG
WDTIFG
rw-0
rw-(0)
rw-(1)
rw-1
rw-(0)
WDTIFG
Set on watchdog timer overflow (in watchdog mode) or security key violation.
Reset on VCC power-up or a reset condition at RST/NMI pin in reset mode.
OFIFG
Flag set on oscillator fault
RSTIFG
External reset interrupt flag. Set on a reset condition at RST/NMI pin in reset mode. Reset on VCC power up.
PORIFG
Power-on reset interrupt flag. Set on VCC power up.
NMIIFG
Set via RST/NMI pin
Table 10. Interrupt Flag Register 2
Address
7
6
5
4
3
2
1
0
03h
UCB0TXIFG
UCB0RXIFG
UCA0TXIFG
UCA0RXIFG
rw-0
UCA0RXIFG
USCI_A0 receive-interrupt flag
UCA0TXIFG
USCI_A0 transmit-interrupt flag
UCB0RXIFG
USCI_B0 receive-interrupt flag
UCB0TXIFG
USCI_B0 transmit-interrupt flag
Copyright
2006–2011, Texas Instruments Incorporated
11
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