参数资料
型号: MTP50P03HDLG
厂商: ON Semiconductor
文件页数: 2/8页
文件大小: 0K
描述: MOSFET P-CH 30V 50A TO220AB
产品目录绘图: MOSFET TO-220, TO-220AB
标准包装: 50
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 50A
开态Rds(最大)@ Id, Vgs @ 25° C: 25 毫欧 @ 25A,5V
Id 时的 Vgs(th)(最大): 2V @ 250µA
闸电荷(Qg) @ Vgs: 100nC @ 5V
输入电容 (Ciss) @ Vds: 4900pF @ 25V
功率 - 最大: 125W
安装类型: 通孔
封装/外壳: TO-220-3
供应商设备封装: TO-220AB
包装: 管件
产品目录页面: 1558 (CN2011-ZH PDF)
其它名称: MTP50P03HDLGOS
MTP50P03HDL
ELECTRICAL CHARACTERISTICS (T J = 25 ° C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain?to?Source Breakdown Voltage
(V GS = 0 Vdc, I D = 250 m Adc)
Temperature Coefficient (Positive)
(C pk ≥ 2.0) (Note 3)
V (BR)DSS
30
?
?
26
?
?
Vdc
mV/ ° C
Zero Gate Voltage Drain Current
I DSS
m Adc
(V DS = 30 Vdc, V GS = 0 Vdc)
(V DS = 30 Vdc, V GS = 0 Vdc, T J = 125 ° C)
?
?
?
?
1.0
10
Gate?Body Leakage Current (V GS = ± 15 Vdc, V DS = 0 Vdc)
I GSS
?
?
100
nAdc
ON CHARACTERISTICS (Note 1)
Gate Threshold Voltage
(V DS = V GS , I D = 250 m Adc)
Threshold Temperature Coefficient (Negative)
(C pk ≥ 3.0) (Note 3)
V GS(th)
1.0
?
1.5
4.0
2.0
?
Vdc
mV/ ° C
Static Drain?to?Source On?Resistance
(C pk ≥ 3.0) (Note 3)
R DS(on)
W
(V GS = 5.0 Vdc, I D = 25 Adc)
Drain?to?Source On?Voltage (V GS = 10 Vdc)
(I D = 50 Adc)
(I D = 25 Adc, T J = 125 ° C)
Forward Transconductance
(V DS = 5.0 Vdc, I D = 25 Adc)
V DS(on)
g FS
?
?
?
15
0.020
0.83
?
20
0.025
1.5
1.3
?
Vdc
mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C iss
?
3500
4900
pF
Output Capacitance
Transfer Capacitance
(V DS = 25 Vdc, V GS = 0 Vdc,
f = 1.0 MHz)
C oss
C rss
?
?
1550
550
2170
770
SWITCHING CHARACTERISTICS (Note 2)
Turn?On Delay Time
t d(on)
?
22
30
ns
Rise Time
Turn?Off Delay Time
Fall Time
(V DD = 15 Vdc, I D = 50 Adc,
V GS = 5.0 Vdc, R G = 2.3 W )
t r
t d(off)
t f
?
?
?
340
90
218
466
117
300
Gate Charge
(See Figure 8)
(V DS = 24 Vdc, I D = 50 Adc,
V GS = 5.0 Vdc)
Q T
Q 1
Q 2
?
?
?
74
13.6
44.8
100
?
?
nC
Q 3
?
35
?
SOURCE?DRAIN DIODE CHARACTERISTICS
Forward On?Voltage
Reverse Recovery Time
(See Figure 15)
Reverse Recovery Stored Charge
(I S =50 Adc, V GS = 0 Vdc)
(I S = 50 Adc, V GS = 0 Vdc, T J = 125 ° C)
(I S = 50 Adc, V GS = 0 Vdc,
dI S /dt = 100 A/ m s)
V SD
t rr
t a
t b
Q RR
?
?
?
?
?
?
2.39
1.84
106
58
48
0.246
3.0
?
?
?
?
?
Vdc
ns
m C
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
L D
nH
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25 ″ from package to center of die)
?
?
3.5
4.5
?
?
Internal Source Inductance
(Measured from the source lead 0.25 ″ from package to source bond pad)
L S
?
7.5
?
nH
1. Pulse Test: Pulse Width ≤ 300 m s, Duty Cycle ≤ 2%.
2. Switching characteristics are independent of operating junction temperature.
3. Reflects typical values.
C pk =
Max limit ? Typ
3 x SIGMA
http://onsemi.com
2
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