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| 型号： | NCP1027P065G |
| 厂商： | ON Semiconductor |
| 文件页数： | 22/30页 |
| 文件大小： | 0K |
| 描述： | IC SWIT PWM PROG CM OVP HV 8DIP |
| 标准包装： | 1,000 |
| 输出隔离： | 隔离 |
| 频率范围： | 58.5kHz ~ 71.5kHz |
| 输入电压： | 7.9 V ~ 10 V |
| 输出电压： | 700V |
| 功率（瓦特）： | 25W |
| 工作温度： | 0°C ~ 125°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm），7 引线 |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
| 其它名称： | NCP1027P065GOS |
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NCP1027
This difference might not be seen as a problem, but some
design specifications impose stringent conditions on the
maximum output current capability, regardless the line
input. Hence the need for an OPP input …
Since we want to limit the power to 12.8 W at high line,
let us calculate the needed peak current:
10 k W and R OPPU made of a series string of 4 1.0 M W
resistors plus a 10-turn 1.0 M W potentiometer set at its
maximum value. An amp-meter is inserted in series with
pin 7 and a volt-meter monitors its voltage with respect to
ground. Once the power supply is powered, slowly rotate
the potentiometer and observe both voltage and current
From equation 6: Ipeak +
2Pout
FSWLp h
= 693 mA to
going up at pin 7. At a certain time, as voltage and current
increase, the controller will shut down the power supply.
deliver 12.8 W at high line.
Compared to our 735 mA, we need to decrease the
setpoint by 6% roughly when V in equals 350 Vdc.
The NCP1027 hosts a special circuitry looking at the
couple voltage/current present on pin 7. Figure 39 shows
how to arrange components around the controller to obtain
Over Power Protection.
Bulk
The current at this time is the one we are looking for.
Suppose these experiments lead to 80 m A with a pin 7
activation voltage of 2.45 V. Final resistor equations are:
VbulkH = 375 Vdc ; the maximum voltage at which OPP
must shut down the controller
V bulkL = 200 Vdc ; the minimum voltage below which
OPP is not activated
I OPP = 80 m A ; the current in pin 7
V f = 2.45 V ; the voltage of pin 7 at the above
condition
ROPPU
ROPPL +
VbulkH- VbulkL
IOPP(VbulkL- Vf)
Vf + 27 k W
(eq. 7)
ROPPH + ROPPL bulkL
Current
Setpoint
Over Power
Protection
OPP
V
Vf
- Vf
+ 2.2 M W
(eq. 8)
ROPPL
GND
Figure 39. A resistive network reduces the
power capability in high-line conditions.
First, you need to know the required injected current and
the voltage across pin 7 to start activating OPP.
Experiments consist in wiring Figure 39 circuit and
running the power supply in conditions where it must shut
down (e.g. highest input voltage and maximum output
current per specification). For this, R OPPL can be put to
V DD
IRR
Ramp
If the OPP feature is not needed for some designs, it is
possible to ground it via a copper wire to the adjacent
ground pin. This can help to develop a larger copper area
in an application where the thermal resistance is an
important parameter.
Ramp Compensation
When operating in Continuous Conduction Mode
(CCM), current-mode power supplies can exhibit
so-called sub-harmonic oscillations. To cure this problem,
the designer must inject ramp compensation. The ramp can
either be added to the current sense information or directly
subtracted from the feedback signal. Figure 40 details the
internal arrangement of the ramp compensation circuitry.
Gate Reset
Control
Vp
RR
Figure 40. The Internal Feedback Chain and the Ramp Compensation Network
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