参数资料
| 型号： | NCP1650EVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 30/31页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL NCP1650 PFC CTLR |
| 设计资源： | NCP1650EVB Schematic NCP1650EVB Bill of Materials NCP1650EVB Test Procedure NCP1650EVB Gerber Zip |
| 标准包装： | 1 |
| 主要目的： | 电源管理，功率因数校正 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | NCP1650 |
| 已供物品： | 板 |
| 其它名称： | NCP1650EVB-ND NCP1650EVBOS |
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NCP1650
C8 =
= 483 m F
Power Amplifier
The compensation for this amplifier will be determined
similar to the network for the voltage error amplifier. The
series RC on pin 8 will create a pole--zero pair based on the
equations given.
Calculating the Loop Gain
The power loop gain should be calculated using high line
conditions. At lower lines the bandwidth will decrease.
Similar to the voltage loop, calculate the gains and power
multiplier pole. Make sure that they are converted to dB’s.
Begin with all stages except the power amplifier, and
determine what the gain of the power amplifier needs to be
at the unity gain frequency. This loop is normally slower
than the voltage loop and will generally be a factor of 5 to 10
lower in bandwidth.
The loop gain without the amplifier should resemble the
following plot:
30
For this example it can be seen that for a bandwidth of
1.0 Hz, the power amplifier needs a gain of –27 dB
(0.045 v/v) at 1.0 Hz, with a zero at 0.7 Hz. The zero
frequency is chosen to match the pole frequency. Although
it is not essential to do this, it is a safe method of assuring a
stable system.
Since the frequency that we are interested in is greater than
the zero frequency, the gain of the amplifier is:
Av = Gm R8
or, R8 = Av ∕ Gm = 0.045 ∕ .0001 = 446 Ohms
a 470 Ohm resistor would be a good choice, and for a zero
at 0.7 Hz:
1
2 ? π ? 470 Ω ? 0.7 Hz
and a 470 m F cap would be a good choice. Using these two
values, the resulting open loop plot would be:
60
20
10
0
--10
--20
--30
POWER LOOP
GAIN LESS
POWER AMP
40
20
0
--20
--40
--60
--40
0.01
0.1
1 10
FREQUENCY (Hz)
100
1000
--80
0.01
0.1
1 10
FREQUENCY (Hz)
100
1000
Figure 46. Power Loop without Power Amp
Figure 47. Power Circuit Open Loop Gain
As stated previously, these are calculated values, and may
require adjustment in actual circuit conditions.
http://onsemi.com
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| NCP1651DR2 | 功能描述:功率因数校正 IC Single Stage PFC RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
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| NCP1652ADR2G | 功能描述:功率因数校正 IC ANA PFC CONTROLLER RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
| NCP1652DR2G | 功能描述:功率因数校正 IC ANA PFC CONTROLLER RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
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