参数资料
型号: NCP3121QPBCKGEVB
厂商: ON Semiconductor
文件页数: 25/41页
文件大小: 0K
描述: EVAL BOARD FOR NCP3121QPBCKG
设计资源: NCP3121 EVB BOM
NCP3121QPBCKGEVB Gerber Files
NCP3121QPBCKGEVB Schematic
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 2,非隔离
输出电压: 3.3V,5V
电流 - 输出: 3A,3A
输入电压: 12V
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: NCP3121
其它名称: NCP3121QPBCKGEVBOS
NCP3121
V OUT + V TRACK 1 ) R5 V TRACK t 0.8 V
Tracking
Voltage tracking is enabled by applying a ramp voltage to
the TRACK pin. When the voltage on the TRACK pin is
below 0.8 V, the feedback voltage will regulate to this
tracking voltage. When the tracking voltage exceeds 0.8 V,
tracking is disabled and the feedback voltage will regulate
to the internal reference voltage.
In this start ? up sequence, the tracking pin is used to match
the output voltage ramps exactly. Higher output voltage will
continue to rise past the lower regulated point. This is
achieved by dividing the higher output voltage by the same
ratio as the lower voltage feedback components and
connecting the divided voltage into the TRACK pin of the
lower voltage. Track pins must be tied high in the normal
operation (except in the tracking mode).
The output voltage during tracking can be calculated with
the following equation:
R6
Note: If enable control is not required, float the EN/SEQ
connections rather than pulling them to VIN or a separate
supply voltage. The NCP3121 will enable itself once VIN
crosses the input UVLO threshold.
R10
AVIN
C13
C3
R8
Cmaster
GND
VIN
Disable
Enable
PG1
PG2
EN1
SW1
VIN
VIN
D1
L1
R1
C7
OUT1
R5
SEQ1
EN2
SEQ2
TRACK1
TRACK2
NCP3121
VIN
VIN
VIN
VIN
SW2
C9
GND
GND
C10
GND
L2
D2
R2
GND
GND
R3
R6
GND
OUT2
C8
R9
GND
R7
GND
R11
GND
R4
GND
GND
C4
GND
C master
VOUT1
C master
VOUT2
Figure 52. Tracking Configuration
http://onsemi.com
25
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