参数资料
| 型号： | NCP5314MNR2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 24/29页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK CPU 2/3/4PH 32QFN |
| 产品变化通告： | Product Discontinuation 30/Jun/2004 |
| 标准包装： | 1 |
| 应用： | 控制器，CPU |
| 输入电压： | 9.5 V ~ 13.2 V |
| 输出数： | 4 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5314MNR2OSCT |
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NCP5314
0
?0.02
Spec Max
?0.04
?0.06
?0.08
?0.10
?0.12
Spec Min
VID ? V OUT
?0.14
0
10
20
30
40
50
60
I OUT (A)
Figure 29. The DC Effects of AVP vs. Load
It is easiest to select a value for R FB and then evaluate the
equation to find R DRP . R LL is simply the desired output
voltage droop divided by the output current. If inductor
sensing is used, R L will be the resistance of the inductor,
assuming that the current sense network equation (eq. 30) is
valid. Refer to the discussion on Current Sensing for further
information.
8. Current Sensing
Current sensing is used to balance current between
different phases, to limit the maximum phase current and to
limit the maximum system current. Since the current
information, sensed across the inductor, is a part of the
control loop, better stability is achieved if the current
information is accurate and noise?free. The NCP5314
introduces a novel feature to achieve the best possible
performance: differential current sense amplifiers.
Two sense lines are routed for each phase, as shown in
Figure 28.
For inductive current sensing, choose the current sense
network (R CSx , C CSx , x = 1, 2, 3 or 4) to satisfy
Figure 30. V DRP Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Too Long
(Slow): V DRP and V OUT Respond Too Slowly.
Figure 31. V DRP Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Too Short
(Fast): V DRP and V OUT Both Overshoot.
RCSx @ CCSx + Lo (RL ) RPCB)
(30)
This will provide an adequate starting point for R CSx and
C CSx . After the converter is constructed, the value of R CSx
(and/or C CSx ) should be fine?tuned in the lab by observing
the V DRP signal during a step change in load current. Tune
the R CSx ? C CSx network by varying R CSx to provide a
“square?wave” at the V DRP output pin with maximum rise
time and minimal overshoot as shown in Figure 32.
Figure 32. V DRP Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Optimal:
V DRP and V OUT Respond to the Load Current Quickly
Without Overshooting.
http://onsemi.com
24
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| NCP5316FTR2 | 功能描述:IC CTRLR BUCK CPU 4/5/6PH 48LQFP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| NCP5316MNR2 | 功能描述:IC CTRLR BUCK CPU 4/5/6PH 48QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
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