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| 型号： | NCP5359DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/9页 |
| 文件大小： | 0K |
| 描述： | IC GATE DRIVER VR11.1/AMD 8-SOIC |
| 产品变化通告： | NCP5359 Electrical Change 15/Sept/2008 |
| 标准包装： | 1 |
| 配置： | 高端和低端，同步 |
| 输入类型： | PWM |
| 延迟时间： | 10ns |
| 配置数： | 1 |
| 输出数： | 2 |
| 高端电压 - 最大（自引导启动）： | 35V |
| 电源电压： | 10 V ~ 13.2 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 其它名称： | NCP5359DR2GOSDKR |
NCP5359
ELECTRICAL CHARACTERISTIC S (V CC = 12 V, T A = 0 ° C to +85 ° C, V EN = 5 V unless otherwise noted)
Characteristics
Symbol
Test Conditions
Min
Typ
Max
Units
Supply Voltage
V CC Operating Voltage
Power ON Reset threshold
V CC
V POR
10
2.8
13.2
V
V
Supply Current
V CC Quiescent Supply Current in
Normal Operation
V CC Standby Current
BST Quiescent Supply Current in
Normal Operation
BST Standby Current
I VCC_NORM
I VCC_SBC
I BST1_normal
I BST2_normal
I BST1_SD
EN = 5 V, PWM = OSC, F SW = 100 k
C LOAD = 0 p
EN = GND; No switching
PWM = +5 V, SW = 0 V
PWM = GND, SW = 0 V
PWM = +5 V
2.0
0.5
1.0
1.0
0.25
5.0
1.0
1.8
1.8
mA
mA
mA
mA
Undervoltage Lockout
I BST2_SD
PWM = GND
0.25
V CC Start Threshold
V CC UVLO Hysteresis
VCC TH
VCC HYS
8.2
8.7
1.0
9.5
V
V
Output Overvoltage Trip Threshold at
Startup
OVPSU
Power Startup time, V CC > 9 V.
(Without trimming)
1.8
2.0
V
EN Input
Input Voltage High
Input Voltage Low
Hysteresis (Note 5)
V EN_HI
V EN_LOW
V EN_HYS
2.0
500
1.0
V
V
mV
Enable Pin Sink Current
I EN_SINK
V CC = 5.5 V
5.0
mA
Propagation Delay Time (Note 5)
tpd hEN
tpd lEN
20
20
60
60
ns
ns
PWM Input
DRVH Comparator Drop Threshold
VTH_DRVH
2.2
V
PWM Input Self Bias Voltage
DRVL Comparator Rise Threshold
Input Current
V PWM
VTH_DRVL
I PWM
PWM = 0 V, EN = GND
1.4
1.5
30
1.6
0.8
V
V
m A
High Side Driver
Output Resistance, Sourcing
Output Resistance, Sinking
Transition Time (Note 7)
Propagation Delay (Notes 5 & 6)
R H_TG
R L_TG
tr DRVH
tf DRVH
tpdh DRVH
tpdl DRVH
V BST – V SW = 12 V
V BST – V SW = 12 V
C LOAD = 3 nF, V BST – V SW = 12 V
C LOAD = 3 nF, V BST – V SW = 12 V
Driving High, C LOAD = 3 nF
Driving Low, C LOAD = 3 nF
10
8.0
2.0
1.0
16
11
3.5
2.5
25
15
35
30
W
W
ns
ns
Low Side Driver
Output Resistance, Sourcing
Output Resistance, Sinking
Transition Time (Note 7)
Propagation Delay (Notes 5 & 6)
Negative Current Detector Threshold
R H_BG
R L_BG
tr DRVL
tf DRVL
tpdh DRVL
tpdl DRVL
V NCDT
SW = GND
SW = V CC
C LOAD = 3 nF
C LOAD = 3 nF
Driving High, C LOAD = 3 nF
Driving Low, C LOAD = 3 nF
(Note 7)
10
8.0
2.0
1.0
16
11
? 1.0
3.5
2.5
25
15
35
30
W
W
ns
ns
mV
Thermal Shutdown
Thermal Shutdown
Thermal Shutdown Hysteresis
Tsd
Tsd hys
(Note 7)
(Note 7)
150
170
20
° C
° C
5. Guaranteed by design; not tested in production .
6. For propagation delays, ”t pdh ” refers to the specified signal going high ”t pdl ” refers to it going low.
7. Design guaranteed.
http://onsemi.com
5
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