- 您现在的位置：买卖IC网 > Datasheet目录346 > NCP5359DR2G (ON Semiconductor)IC GATE DRIVER VR11.1/AMD 8-SOIC Datasheet资料下载
参数资料
| 型号： | NCP5359DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/9页 |
| 文件大小： | 0K |
| 描述： | IC GATE DRIVER VR11.1/AMD 8-SOIC |
| 产品变化通告： | NCP5359 Electrical Change 15/Sept/2008 |
| 标准包装： | 1 |
| 配置： | 高端和低端，同步 |
| 输入类型： | PWM |
| 延迟时间： | 10ns |
| 配置数： | 1 |
| 输出数： | 2 |
| 高端电压 - 最大（自引导启动）： | 35V |
| 电源电压： | 10 V ~ 13.2 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 标准包装 |
| 其它名称： | NCP5359DR2GOSDKR |
NCP5359
APPLICATION INFORMATION
The NCP5359 gate driver is a single phase MOSFET
driver designed for driving two N ? channel MOSFETs in a
synchronous buck converter topology. This driver is
compatible with the NCP3418B gate drive. This gate drives
operation is similar with the NCP3418B, but has two
additional new features: Bidirection fault detection and
multilevel PWM input. When the gate driver works with
ON Semiconductor ’s NCP5392 controller, it can provide a
difference output logic status through multi ? level PWM
input. For this new feature, higher efficiency can be
provided. For the bidirection fault detection function, it is
used to provide a driver state information to other gate
drivers and controller in a multiphase buck converter. e.g
overvoltage protection (OVP) function at startup, thermal
shutdown and undervoltage lockout (UVLO). This feature
can provide an additional protection function for the
multi ? phase system when the fault condition occurs in one
channel. With this additional feature, converter overall
system will be more reliable and safe.
Enable Pin
The bidirection enable pin is connected with an open drain
MOSFET. This pin is controlled by internal or external
signal. There are three conditions will be triggered:
1. The voltage at SWN pin is higher than preset
voltage at power startup.
2. The controller hits the UVLO at V CC pin.
3. The controller hits the thermal shutdown.
When the internal fault has been detected, EN pin will be
pull low. In this case, the drive output DRVH and DRVL will
be forced low, until the fault mode remove then restart
automatic.
Undervoltage Lockout
The DRVH and DRVL are held low until V CC reaches 9 V
during startup. The PWM signals will control the gate status
when V CC threshold is exceeded. If V CC decreases to 3.2 V
below the threshold, the output gate will be forced low until
input voltage V CC rises above the startup threshold.
Power ON reset
Power on reset feature is used to protect a gate driver avoid
abnormal status driving the startup condition. When the
initial soft ? start voltage is higher than 3.2 V, the gate driver
will monitor the switching node SW pin. If SW pin high than
1.9 V, bottom gate will be force to high for discharge the
output capacitor. The fault mode will be latch and EN pin
will force to be low, unless the driver is recycle. When input
voltage is higher than 9 V, the gate driver will normal
operation, top gate driver DRVH and bottom gate driver will
follow the PWM signal decode to a status.
Adaptive Nonoverlap
The nonoverlap dead time control is used to avoid the
shoot through damage the power MOSFETs. When the
PWM signal pull high, DRVL will go low after a
propagation delay, the controller will monitors the switching
node (SWN) pin voltage and the gate voltage of the
MOSFET to know the status of the MOSFET. When the low
side MOSFET status is off an internal timer will delay turn
on of the high–side MOSFET. When the PWM pull low, gate
DRVH will go low after the propagation delay (tpd DRVH).
The time to turn off the high side MOSFET is depending on
the total gate charge of the high ? side MOSFET. A timer will
be triggered once the high side MOSFET is turn off to delay
the turn on the low ? side MOSFET.
Layout Guidelines
Layout is very important thing for design a DC ? DC
converter. Bootstrap capacitor and V CC capacitor are most
critical items, it should be placed as close as to the driver IC.
Another item is using a GND plane. Ground plane can
provide a good return path for gate drives for reducing the
ground noise. Therefore GND pin should be directly
connected to the ground plane and close to the low ? side
MOSFET source pin. Also, the gate drive trace should be
considered. The gate drives has a high di/dt when switching,
therefore a minimized gate drives trace can reduce the di/dv,
raise and fall time for reduce the switching loss.
http://onsemi.com
7
相关PDF资料 |
PDF描述 |
|---|---|
| NCP5360RMNR2G | IC DRIVER MOSFET 56QFN |
| NCP5366MNR2G | IC DRIVER MOSFET DFN |
| NCP5369MNR2G | IC DRIVER MOSFET DFN |
| NCP5623BMUTBG | IC LED DRIVER RGB I2C 12-LLGA |
| NCP5623CMUTBG | IC LED DRIVER RGB I2C 12-LLGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP5359MNR2G | 功能描述:功率驱动器IC SINGLE GATE DRIVER RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| NCP5360AMNR2G | 功能描述:功率驱动器IC NCP5360A 48A SETUP RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| NCP5360RMNR2G | 功能描述:功率驱动器IC INTEGRATED DRIVER MOSFET RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| NCP5366MNR2G | 功能描述:功率驱动器IC INTEGRATED DRIVER MOSFET RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| NCP5369 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Integrated Driver and MOSFET |
发布紧急采购，3分钟左右您将得到回复。