参数资料
| 型号： | NCV3012DTBR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 14TSSOP |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 88kHz |
| 占空比： | 86% |
| 电源电压： | 4.7 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 带卷 (TR) |
NCP3012
Startup and Shutdown
Once enable is asserted the device begins its startup
process. Closed ? loop soft ? start begins after a 400 m s delay
wherein the boost capacitor is charged, and the current limit
threshold is set. During the 400 m s delay the OTA output is
set to just below the valley voltage of the internal ramp. This
is done to reduce delays and to ensure a consistent pre
soft ? start condition. The device increases the internal
reference from 0 V to 0.8 V in 32 discrete steps while
maintaining closed loop regulation at each step. Some
overshoot may be evident at the start of each step depending
on the voltage loop phase margin and bandwidth. See
The soft ? stop process begins once the EN pin voltage
goes below the input low threshold. Soft ? stop decreases the
internal reference from 0.8 V ? 0 V in 32 steps as with
Soft ? Start. Soft ? Stop finishes with one “last” high side gate
pulse at half the period of the prior pulse. This helps ensure
positive inductor current following turn off at light loads,
which prevents negative output voltage.
Enable low during Soft ? Start will result in Soft ? Stop
down counting from that step. Likewise, Enable high during
Soft ? Stop will result in Soft ? Start up counting from that
step.
Figure 19. The total soft ? start time is 14 ms.
0.8 V Output Voltage
25 mV Steps
32 Voltage Steps
Internal Reference Voltage
Internal Ramp
OTA Output
0 .7V
0V
Figure 19. Soft ? Start Details
http://onsemi.com
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