参数资料
| 型号： | NCV3012DTBR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 25/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 14TSSOP |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 88kHz |
| 占空比： | 86% |
| 电源电压： | 4.7 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 带卷 (TR) |
NCP3012
Compensation Type II
This compensation is suitable for electrolytic capacitors.
Components of the Type II compensation (Figure 36)
network can be specified by the following equations:
f Z1 + 0.75 @ f P0
f Z2 + f P0
f P2 + f Z0
(eq. 47)
(eq. 48)
(eq. 49)
f P3 +
f S
2
(eq. 50)
Method II is better suited for ceramic capacitors that
typically have the lowest ESR available:
f Z2 + f 0 @
f P2 + f 0 @
1 * sin q max
1 ) sin q max
1 ) sin q max
1 * sin q max
(eq. 51)
(eq. 52)
f Z1 + 0.5 @ f Z2
(eq. 53)
Figure 36. Type II Compensation
f P3 + 0.5 @ f S
(eq. 54)
R C1 +
C C1 +
2 @ p @ f 0 @ L @ V RAMP @ V OUT
ESR @ V IN @ V ref @ gm
1
0.75 @ 2 @ p @ f P0 @ R C1
(eq. 43)
(eq. 44)
q max is the desired maximum phase margin at the zero
crossover frequency, ? 0 . It should be 45 ° ? 75 ° . Convert
degrees to radians by the formula:
2 @ p
q max + q max degress @ 360 : Units + radians (eq. 55)
C C2 +
1
R C1 u u
2
gm
C C1 +
1
C C2 +
1
(eq. 45)
p @ R C1 @ f S
V OUT * V ref
R1 + @ R2 (eq. 46)
V ref
V RAMP is the peak ? to ? peak voltage of the oscillator ramp
and gm is the transconductance error amplifier gain.
Capacitor C C2 is optional.
The remaining calculations are the same for both methods.
(eq. 56)
(eq. 57)
2 @ p @ f Z1 @ R C1
(eq. 58)
2 @ p @ f P3 @ R C1
Compensation Type III
Tantalum and ceramics capacitors have lower ESR than
electrolytic, so the zero of the output LC filter goes to a
C FB1 +
2 @ p @ f 0 @ L @ V RAMP @ C OUT
V IN @ R C1
(eq. 59)
R FB1 +
R1 +
higher frequency above the zero crossover frequency. This
requires a Type III compensation network as shown in
Figure 37.
There are two methods to select the zeros and poles of this
compensation network. Method I is ideal for tantalum
1
2 p @ C FB1 @ f P2
1
2 @ p @ C FB1 @ f Z2
* R FB1
(eq. 60)
(eq. 61)
V
output capacitors, which have a higher ESR than ceramic:
R2 +
ref
V OUT * V ref
@ R1
(eq. 62)
If the equation in Equation 63 is not true, then a higher value
of R C1 must be selected.
R1 @ R2 @ R FB1
R1 @ R FB1 ) R2 @ R FB1 ) R1 @ R2
u
1
gm
(eq. 63)
Figure 37. Type III Compensation
http://onsemi.com
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