参数资料
| 型号： | NCV7240DPR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 12/26页 |
| 文件大小： | 0K |
| 描述： | IC DVR RELAY 8CH LOW SIDE 24SSOP |
| 标准包装： | 2,500 |
| 系列： | * |
NCV7240
DETAILED OPERATING DESCRIPTION
Power Outputs
The NCV7240 provides eight independent 600mA power
transistors with their source connection referenced to the
ground pin and with their drain connection brought out to
individual pins resulting in 8 independent low?side drivers.
Output driver location on one side of the IC layout provides
for optimum pcb layout to the loads.
Internal clamping structures are provided to limit
transient voltages when switching inductive loads. Each
output has an over load detection current of 0.6 A (min)
where the drivers turn?off and stay latched off. An Over
Load Current Shut?Down Delay Time of 3 m s (min) is
designed into the IC as a filter allowing for spikes in current
which may occur during normal operation and allowing for
protection from overload conditions.
Faults can be cleared with the SPI input register
(command 00) or via a power?on?reset. Fault detection is
provided in real time. Detection is provided both during
output turn?on and with output already on. (See Page 17,
Clearing the Fault Registers)
The NCV7240 is available in a SSOP?24 package.
Output Control (SPI)
Each output driver is controlled via a digital SPI port after
the device has powered up (out of POR) and enabled via the
Table 1. MODES OF OPERATION
Modes of
EN pin. The NCV7240 device will go through a power up
reset each time the EN pin is toggled high resulting in a
device setup of default values as described in the Register
Specifics section. Standby Mode, Input Mode, ON Mode,
and OFF Mode are all selectable via the SPI for each channel
independently.
Power up, Power?On Reset (UVLO mode)
Both VDD and VDDA supply an independent
power?on?reset function to the IC. Coming out of
power?on?reset all input bits are set to a 1 (OFF Mode) and
all output bits are set to a 0 except for the TER bit which is
set to a 1. The device cannot operate without both supplies
above their respective power?on reset thresholds with the
exception of LHI mode. During LHI mode, VDD POR is
ignored and the device is only affected by VDDA POR.
The NCV7240 powers up into the Global OFF Mode
without the open circuit diagnostic current enabled. This
allows the device to be turned on via EN = 0 to EN = 1 with
LED loads avoiding illumination of the LED loads
(reference Figure 21 State Diagram). All other paths to
Global OFF Mode enable open circuit diagnostic current.
Operation
UVLO Mode
OFF Mode
Global OFF Mode
ON Mode
Limp Home Mode
(LHI)
Low Iq Mode
Standby Mode
Global
Standby Mode
Input Mode
Conditions
VDD or VDDA below their respective POR
thresholds
SPI Control
(Command 11)
SPI Control
All Channels (Command 11)
SPI Control
(Command 10)
LHI = high, EN = x
EN = LHI = low
SPI Control
(Command 00)
SPI Control
All Channels (Command 00)
SPI Control
Description
All outputs off in this mode.
Coming out of this mode
with EN = 1 sets all channels in the OFF mode
without open circuit diagnostic current enabled.
With LHI = 1 and EN = x, the part enters limp home mode.
Output off.
Open circuit diagnostic current is disabled (powerup mode).
Open circuit diagnostic current is enabled (normal mode).
Output off.
Open circuit diagnostic current is disabled (powerup mode).
Open circuit diagnostic current is enabled (normal mode).
Output on.
Dedicated output turn on control of
OUT1?OUT4 using IN1?IN4.
OUT5?OUT8 are in OFF Mode.
Provides a state with the lowest quiescent current for V DD
and VDDA.
Provides an OFF state with
Open circuit diagnostic current disabled.
Provides a reduced quiescent current mode.
Provides an OFF state with
Open circuit diagnostic current disabled.
Directs output channel to be driven from INx input pins.
(Command 01)
http://onsemi.com
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