参数资料
型号: NCV7240DPR2G
厂商: ON Semiconductor
文件页数: 17/26页
文件大小: 0K
描述: IC DVR RELAY 8CH LOW SIDE 24SSOP
标准包装: 2,500
系列: *
NCV7240
V BAT
Open
Load
Flag
Channel x
Open Load
detection
Iol
60uA
Output
Turn ?on
Vol
1.75V
OUTx
GND
Roc
Control
Open Load Detection
is active when the driver is off,
Vol = Open Load Detection Threshold Voltage
Iol = Open Load Diagnostic Sink Current
in LHI mode,
or OFF mode ( command 11 ).
Figure 23. Open Load Detection
NOTE: Detection of an open load condition is limited by the Parallel Control Output turn?off time and the Open Load
Detection Time specifications. The maximum allowable frequency of operation for PWM (pulse width
modulation) using the INx inputs is calculated from the maximum limits of these specifications. INx must be low
for longer than the sum of these maximum specifications (50 m sec and 200 m sec). Assuming a 50% duty cycle
yields a maximum frequency of operation of [1/(2*(50 m + 200 m ))]=2 kHz.
LED Loads
The NCV7240 features a power up feature for the Global OFF Mode enabling the part to power up in a mode without the
open load diagnostic current enabled. This averts any unintended illumination of LED loads during power up.
Programming Features
The NCV7240 provides two registers.
1. Input Register. Input for IC mode state and output driver state control.
2. Output Register. Provides diagnostic information on the output driver condition.
Clearing the Fault Registers
Registers are reset with the following conditions.
1. Channel in Standby Mode.
2. Power?on reset of VDD.
3. Power?on reset of VDDA.
4. EN low.
5. Coming out of Limp Home Mode(LHI).
SPI?Interface
The device provides a 16 bit SPI?interface for output drive control and fault reporting. Data is imported into the NCV7240
through the SI (serial input) pin. Data is exported out of the NCV7240 through the SO (serial output) pin.
The input?frame (SI) (2 bits / channel) is used to command the output stages.
The response frame (SO) provides channel?specific (2 bits / channel) status information fault reporting.
Words should be composed of 16 bits MSB (most significant bit) transmitted first.
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