参数资料
| 型号： | NCV7240DPR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 24/26页 |
| 文件大小： | 0K |
| 描述： | IC DVR RELAY 8CH LOW SIDE 24SSOP |
| 标准包装： | 2,500 |
| 系列： | * |
NCV7240
SI SPI Inp ut Data (16-bit serial structure of input word)
The 16?bit data received (SI) is decoded into instructions for each channel per the table below.
After a power?on reset, all register bits are set to a 1.
Table 4. SPI INPUT DATA
Channel 8
Channel 7
Channel 6
Channel 5
Channel 4
Channel 3
Channel 2
Channel 1
MSB
LSB
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
INPUT DATA REGISTER
Field
channel x
Bits
15, 14
Command
Description
(x = 1?8)
13, 12
11, 10
9, 8
7, 6
5, 4
3, 2
1, 0
00
01
Channel Stand?by Mode
Fast channel turn off
Fault Registers reset
Diagnostic Current
Input Mode
Disabled
Channel Input directed to INx.
(reference PWM operation section).
Diagnostic Current
Enabled in OFF State.
10
ON Mode
Channel turned on.
Diagnostic Current
Disabled
11
OFF Mode
Channel turned off.
Diagnostic Current
Enabled (Disabled after POR)*
*For proper LED load operation.
SO (fault diagnostic retrieval)
Output fault diagnostics from the output fault diagnostic register are shifted out on any 16 bit word clocked into Serial Input
(SI).
Only output fault diagnostics and frame detection errors are available through the serial output (SO).
Table 5. SPI OUTPUT DATA
TER
OL8
D8
OL7
D7
OL6
D6
OL5
D5
OL4
D4
OL3
D3
OL2
D2
OL1
D1
FAULT DIAGNOSTIC REGISTER
Field
TER
Oln
(n = 1 ? 8)
Dn
(n = 1 ? 8)
Bits
CSB high?to?low
prior to 1st
SCLK low?to?high
1, 3, 5,
7, 9, 11,
13, 15
0, 2, 4,
6, 8, 10,
12, 14
Description
Transmission Error.
0 Successful transmission in previous communication.
1 Frame detection error in previous transmission
or exiting Limp Home Mode, exiting UVLO Mode, or exiting Low Iq mode to Global Off Mode.
Open Load
0 Normal Operation
1 Fault detected
Over Load or Over Temperature
0 Normal Operation
1 Fault detected
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