参数资料
| 型号： | NCV7240DPR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/26页 |
| 文件大小： | 0K |
| 描述： | IC DVR RELAY 8CH LOW SIDE 24SSOP |
| 标准包装： | 2,500 |
| 系列： | * |
NCV7240
PACKAGE PIN DESCRIPTION
SSOP?24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
GND
GND
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
GND
GND
VDD
IN4
IN3
IN2
IN1
LHI
SO
SCLK
EN
SI
CSB
VDDA
Description
Ground.
Ground.
Channel 1 low?side drive output. Requires an external pull?up device for operation.
Channel 2 low?side drive output. Requires an external pull?up device for operation.
Channel 3 low?side drive output. Requires an external pull?up device for operation.
Channel 4 low?side drive output. Requires an external pull?up device for operation.
Channel 5 low?side drive output. Requires an external pull?up device for operation.
Channel 6 low?side drive output. Requires an external pull?up device for operation.
Channel 7 low?side drive output. Requires an external pull?up device for operation.
Channel 8 low?side drive output. Requires an external pull?up device for operation.
Ground.
Ground.
Digital Power Supply for SO output (3.3 V or 5 V).
Parallel control of OUT4 and OUT8
Ground if not used for best EMI performance.
Alternatively keep open and internal pull?down will hold the input low.
(120 k W pull down resistor).
Parallel control of OUT3 and OUT7
Ground if not used for best EMI performance.
Alternatively keep open and internal pull?down will hold the input low.
(120 k W pull down resistor).
Parallel control of OUT2 and OUT6.
Ground if not used for best EMI performance.
Alternatively keep open and internal pull?down will hold the input low.
(120 k W pull down resistor).
Parallel control of OUT1 and OUT5.
Ground if not used for best EMI performance.
Alternatively keep open and internal pull?down will hold the input low.
(120 k W pull down resistor).
Limp Home Input. Active High.
A high on this pin powers up the device and activates the respective output drive INx designator while
disabling outputs OUT5?OUT8.
Input SPI commands are ignored, but the output register reports faults.
(Read capability only. No write capability.)
All registers are reset coming out of LHI mode.
Ground if not used for best EMI performance.
Alternatively keep open and internal pull?down resistor (120 k W ) will hold the input low.
SPI serial data output. Output high voltage level referenced to pin VDD.
SPI clock (120 k W pull down resistor).
Global Enable (active high). (120 k W pull down resistor).
SPI serial data input (120 k W pull down resistor).
SPI Chip Select ”Bar” (120 k W pull up resistor to VDD).
Analog Power Supply Input voltage (5 V).
http://onsemi.com
4
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