- 您现在的位置：买卖IC网 > Datasheet目录484 > NOIL1SE3000A-GDC (ON Semiconductor)IC IMAGE SENSOR 3MP 369-PGA Datasheet资料下载
参数资料
| 型号： | NOIL1SE3000A-GDC |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/57页 |
| 文件大小： | 0K |
| 描述： | IC IMAGE SENSOR 3MP 369-PGA |
| 标准包装： | 1 |
| 系列： | * |
| 象素大小： | 8µm x 8µm |
| 有源象素阵列： | 1696H x 1710V |
| 每秒帧数： | 485 |
| 电源电压： | 2.5V, 3.3V |
| 类型： | CMOS 成像 |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
| 其它名称： | CYIL1SE3000AA-GZDC CYIL1SE3000AA-GZDC-ND |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页
NOIL1SN3000A
Gain Level
The ADCs are designed using fully differential circuits to
improve performance and noise immunity. In addition, a
redundant signed digit (RSD) 1.5 bit per stage architecture
with digital error correction is used to improve differential
nonlinearity (DNL) and ensure that no codes are missing.
Interstage ADC gain errors are addressed using
commutation techniques for capacitor matching.
Auto-zeroing and other calibration methods are
implemented to remove offsets.
References and Programmable Trimming
Bits 6:4 of SPI register 64 (decimal) allow adjustment of
the Vrefp-Vrefm differential ADC reference level. Eight
settings are provided to enable trimming of the dynamic
range. Reduced dynamic range is used to optimize signals in
low light intensity, where reduced pixel levels require
further gain. Table 10 provides the permitted trim settings.
Table 10. PROGRAMMABLE ADC REFERENCE
LEVEL
Register Address 64 Vrefp-Vrefm Comments
(dec)
Bit 6 Bit 5 Bit 4 (typ)
0 0 0 0.5x Maximum effective
gain +6.0 dB (2x)
0 0 1 0.67x
0 1 0 0.71x
0 1 1 0.77x
The black voltage level from the pixel array is more
positive than the user set Vdark or “black” reference level.
This results in a nonzero differential voltage in the PGAs and
other AFE stages. This condition prevents obtaining a
desired 0 code out of the ADCs. The 0.95x and 0.91x trim
settings are specifically supplied to allow minor adjustment
to the ADC differential reference (Vrefp-Vrefm) to ensure a
zero level code in these conditions.
The additional trim settings are provided as dynamic
range adjustments in low light intensities to act as effective
global gain settings. The absolute level of gain (from the
typical values) is not guaranteed. However, the gain
increases are monotonic. Using this method, you can obtain
a maximum gain of approximately 2x (+6.0 dB). As a result,
the combined gain of both PGAs and the ADC reference
trimming available is 8x maximum.
Some reference voltages are overdriven after the on-chip
control logic is powered down (refer section On ? Chip
BandGap Reference and Current Biasing on page 17).
Overdriving, a feature intended for testing and debugging,
is not recommended for normal operation. The reference
voltages that are overdriven are:
? Vrefp - Vrefm (can be overdriven as a pair)
? Vcm
? Vdark
? Internal bandgap voltage
Table 11 summarizes the ADC and AFE (signal
processing) parameters.
1
0
0
0.83x
Each pair of odd and even kernel AFE + ADC channels are
1
1
1
0
1
1
1
0
1
0.91x
0.95x
1.0 x
Available setting to
ensure 0 code
Available setting to
ensure 0 code
POR (startup)
default level
individually powered down with its associated LVDS
serialization channel. This is controlled through bits in SPI
registers 66–70 (decimal). Logic 1 is the power down state.
The POR defaults are logic 0 for all channels powered on.
Table 11. AFE AND ADC PARAMETERS
Parameter
Input range
(single to differential converter; S2D)
Vblack
Analog PGA gain and settings
Input range (ADC)
ADC type
ADC resolution
Sampling rate per ADC
ENOB
Differential nonlinearity (DNL)
Integral nonlinearity (INL)
Power supply
Parameter Value (typical)
1.5 V to 0.3 V
(SE to unipolar differential)
1.2 V to 1.5 V (typical)
1x to 4x (6 gain settings)
0.75 V to 1.75 V
Pipelined (four ADC clock latency)
8 bits
26.5 MSPS
7.5 bits
± 0.5 LSB
± 1.0 LSB
2.5 V ± 0.25 V
http://onsemi.com
11
Comment
S2D performs inversion. Referenced from Vblack
Dark or black level reference from SPI programmable
DAC. 0.01 m F to gnd
3-bit SPI programmable. 1x, 1.5x, 2x, 2.25x, 3x, 4x
1 V maximum Vrefp-Vrefm (2 Vp-p maximum)
With digital error correction (no missing codes)
Maximum 30 MSPS
Effective number of bits
No missing codes
相关PDF资料 |
PDF描述 |
|---|---|
| NOIL1SM0300A-WWC | IC IMAGE SENSOR LUPA300 48LLC |
| NOIL2SC1300A-GDC | IC IMAGE SENSOR LUPA1300 168PGA |
| NOIV1SE025KA-GDC | IC IMAGE SENSOR 25MP 355PGA |
| NP100P04PDG-E1-AY | MOSFET P-CH -40V MP-25ZP/TO-263 |
| NP100P04PLG-E1-AY | MOSFET P-CH -40V MP-25ZP/TO-263 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| NOIL1SM0300A-QDC | 功能描述:IC IMAGE SENSOR LUPA300 48LLC RoHS:是 类别:传感器，转换器 >> 图像，相机 系列:* 标准包装:480 系列:- 象素大小:6.7µm x 6.7µm 有源象素阵列:768H x 488V 每秒帧数:52 电源电压:3.3V 类型:CMOS 成像 封装/外壳:48-QFP 供应商设备封装:48-QFP 包装:托盘 请注意:* 配用:4H2105-ND - HEADBOARD FOR KAC-004014H2104-ND - KIT EVAL FOR KAC-00401 其它名称:4H20954H2095-NDKAC-00401-CBC-LB-A0 |
| NOIL1SM0300A-WWC | 功能描述:IC IMAGE SENSOR LUPA300 48LLC RoHS:是 类别:传感器，转换器 >> 图像，相机 系列:LUPA300 标准包装:480 系列:- 象素大小:6.7µm x 6.7µm 有源象素阵列:768H x 488V 每秒帧数:52 电源电压:3.3V 类型:CMOS 成像 封装/外壳:48-QFP 供应商设备封装:48-QFP 包装:托盘 请注意:* 配用:4H2105-ND - HEADBOARD FOR KAC-004014H2104-ND - KIT EVAL FOR KAC-00401 其它名称:4H20954H2095-NDKAC-00401-CBC-LB-A0 |
| NOIL1SM1300AWES | 制造商:ON Semiconductor 功能描述:PW/H |
| NOIL1SM4000A | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:LUPA4000: 4 MegaPixel High Speed CMOS Sensor |
| NOIL1SM4000A-GDC | 功能描述:IC IMAGE SENSOR LUPA4000 127PGA RoHS:是 类别:传感器，转换器 >> 图像，相机 系列:* 标准包装:480 系列:- 象素大小:6.7µm x 6.7µm 有源象素阵列:768H x 488V 每秒帧数:52 电源电压:3.3V 类型:CMOS 成像 封装/外壳:48-QFP 供应商设备封装:48-QFP 包装:托盘 请注意:* 配用:4H2105-ND - HEADBOARD FOR KAC-004014H2104-ND - KIT EVAL FOR KAC-00401 其它名称:4H20954H2095-NDKAC-00401-CBC-LB-A0 |
发布紧急采购，3分钟左右您将得到回复。