参数资料
型号: NOIL1SE3000A-GDC
厂商: ON Semiconductor
文件页数: 16/57页
文件大小: 0K
描述: IC IMAGE SENSOR 3MP 369-PGA
标准包装: 1
系列: *
象素大小: 8µm x 8µm
有源象素阵列: 1696H x 1710V
每秒帧数: 485
电源电压: 2.5V, 3.3V
类型: CMOS 成像
封装/外壳: *
供应商设备封装: *
包装: *
其它名称: CYIL1SE3000AA-GZDC
CYIL1SE3000AA-GZDC-ND
NOIL1SN3000A
Table 12. LVDS DRIVER SPECIFICATIONS
Parameter
Description
Specification (guaranteed by design)
Min
Typ
Max
Units
|V T | (Note 1)
|V T (1)|–|V T (0)|
V OS
d|V OS |
I SA /I SB
I SAB
t r t f
|V ring |
d|V OS |
ZT
ZC(f)
I OFF
t SKD1
t SKD2
t SKCD1
t SKCD2
t jit_rms (Note 2)
t jit_det (Note 3)
f MAX
f MIN (Note 4)
Differential logic voltage
Delta differential voltage
Common mode offset
Difference in common mode voltage for logic 1 and 0
Output currents in short to ground condition
Output current in differential short condition
Differential rise and fall time
Differential over and undershoot
Dynamic common mode offset
Termination resistance
Characteristic impedance of the interconnect
Offstate current
Differential skew
Differential channel to channel skew
Differential clock out to data skew
Differential clock in to data skew
Random jitter
Deterministic jitter
Maximum operating frequency
Minimum operating frequency
247
1.125
400
90
90
1
350
1.25
100
454
50
1.375
50
24
12
250
0.2*V T
150
132
132
10
0.25
0.5
1
3
50
500
206
mV
mV
V
mV
mA
mA
ps
V
mV PP
W
W
m A
ns
ns
ns
ns
ps
ps
MHz
MHz
1. The V MEM_L power supply should have a sourcing and sinking current capability.
2. The driver output swing is tuned through the LVDS driver bias current settings in the SPI register. This feature is also used to reduce power
consumption. Alternatively, decrease the termination resistor to boost the speed and keep the swing identical by increasing the bias current.
3. Jitter with reference to LUPA3000 input clock
4. This is from LVDS point of view, from sensor point of view f MIN is 4 MHz (about 10 fps). At lower speeds dark current and storage node leakage
starts influencing the image quality.
Output trace characteristics affect the performance of the
LUPA3000 interface. Use controlled impedance traces to
match trace impedance to the transmission medium. The
best practice regarding noise coupling and reflections is to
run the differential pairs close together. Limit skew due to
Table 13. LVDS RECEIVER SPECIFICATIONS
receiver end limitations and for reasons of EMI reduction.
Matching the differential traces is very important. Common
mode and interconnect media specifications are identical to
LVDS receiver specifications.
Parameter
Description
Specification (guaranteed by design)
Min
Typ
Max
Units
I IA , I IB
I IA -I IB
Z T
|V ID |
V IH , V IL
T JIT_TOT
Input current
Input current unbalance
Required external termination
Differential input
Minimum and maximum input voltages
Total jitter at LUPA3000 clock input
90
100
0
100
20
6
132
600
2.4
500
m A
m A
W
mV
V
ps
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