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| 型号： | OM13032,598 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 10/74页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL LPC11U24 |
| 标准包装： | 1 |
| 类型： | MCU |
| 适用于相关产品： | LPC11U24 |
| 所含物品： | 板 |
| 其它名称： | 568-8599 |
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LPC11U2X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
18 of 74
NXP Semiconductors
LPC11U2x
32-bit ARM Cortex-M0 microcontroller
7.8.1 Features
GPIO pins can be configured as input or output by software.
All GPIO pins default to inputs with interrupt disabled at reset.
Pin registers allow pins to be sensed and set individually.
Up to eight GPIO pins can be selected from all GPIO pins to create an edge- or
level-sensitive GPIO interrupt request.
Any pin or pins in each port can trigger a port interrupt.
7.9 USB interface
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports
hot-plugging and dynamic configuration of the devices. The host controller initiates all
transactions.
The LPC11U2x USB interface consists of a full-speed device controller with on-chip PHY
(PHYsical layer) for device functions.
Remark: Configure the LPC11U2x in default power mode with the power profiles before
using the USB (see Section 7.17.5.1). Do not use the USB with the part in performance,
efficiency, or low-power mode.
7.9.1 Full-speed USB device controller
The device controller enables 12 Mbit/s data exchange with a USB Host controller. It
consists of a register interface, serial interface engine, and endpoint buffer memory. The
serial interface engine decodes the USB data stream and writes data to the appropriate
endpoint buffer. The status of a completed USB transfer or error condition is indicated via
status registers. If enabled, an interrupt is generated.
7.9.1.1
Features
Dedicated USB PLL available.
Fully compliant with USB 2.0 specification (full speed).
Supports 10 physical (5 logical) endpoints including one control endpoint.
Single and double buffering supported.
Each non-control endpoint supports bulk, interrupt, or isochronous endpoint types.
Supports wake-up from Deep-sleep mode and Power-down mode on USB activity
and remote wake-up.
Supports SoftConnect.
7.10 USART
The LPC11U2x contains one USART.
The USART includes full modem control, support for synchronous mode, and a smart
card interface. The RS-485/9-bit mode allows both software address detection and
automatic address detection using 9-bit mode.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| OM13033 | 制造商:NXP Semiconductors 功能描述:EVAL ARM NGX LPC11U24 制造商:NXP Semiconductors 功能描述:LPC11U24, NGX, KEIL, EVAL BOARD 制造商:NXP Semiconductors 功能描述:LPC11U24, NGX, KEIL, EVAL BOARD; Silicon Manufacturer:NXP; Core Architecture:ARM; Core Sub-Architecture:Cortex-M0; Silicon Core Number:LPC11xxx; Silicon Family Name:LPC11Uxx; Features:Evaluation Board for LPC11U24 Microcontroller; ;RoHS Compliant: Yes |
| OM13033,598 | 功能描述:开发板和工具包 - ARM NGX LPC11U24 Eval Board RoHS:否 制造商:Arduino 产品:Development Boards 工具用于评估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口类型:DAC, ICSP, JTAG, UART, USB 工作电源电压:3.3 V |
| OM13033598 | 制造商:NXP Semiconductors 功能描述:EVAL ARM NGX LPC11U24 |
| OM13034,598 | 制造商:NXP Semiconductors 功能描述:EVAL, IAR, LPC1347, J-LINK LITE 制造商:NXP Semiconductors 功能描述:EVAL, IAR, LPC1347, J-LINK LITE, Silicon Manufacturer:NXP, Core Architecture:ARM 制造商:NXP Semiconductors 功能描述:EVAL, IAR, LPC1347, J-LINK LITE, Silicon Manufacturer:NXP, Core Architecture:ARM, Core Sub-Architecture:Cortex-M3, Silicon Core Number:LPC1347, Silicon Family Name:LPC1300, Kit Contents:Evaluation Board for LPC1347 , RoHS Compliant: Yes |
| OM13034598 | 制造商:NXP Semiconductors 功能描述:EVAL IAR LPC1347 J-LINK LITE |
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