参数资料
型号: OM13032,598
厂商: NXP Semiconductors
文件页数: 22/74页
文件大小: 0K
描述: BOARD EVAL LPC11U24
标准包装: 1
类型: MCU
适用于相关产品: LPC11U24
所含物品:
其它名称: 568-8599
LPC11U2X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
29 of 74
NXP Semiconductors
LPC11U2x
32-bit ARM Cortex-M0 microcontroller
8.
Limiting values
[1]
The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated
maximum.
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless
otherwise noted.
c) The limiting values are stress ratings only. Operating the part at these values is not recommended, and proper operation is not
guaranteed. The conditions for functional operation are specified in Table 5.
[2]
Maximum/minimum voltage above the maximum operating voltage (see Table 5) and below ground that can be applied for a short time
(< 10 ms) to a device without leading to irrecoverable failure. Failure includes the loss of reliability and shorter lifetime of the device.
[3]
See Table 6 for maximum operating voltage.
[4]
VDD present or not present. Compliant with the I2C-bus standard. 5.5 V can be applied to this pin when VDD is powered down.
[5]
Including voltage on outputs in 3-state mode.
[6]
The maximum non-operating storage temperature is different than the temperature for required shelf life which should be determined
based on required shelf lifetime. Please refer to the JEDEC spec (J-STD-033B.1) for further details.
[7]
Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k
series resistor.
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
supply voltage (core and
external rail)
0.5
+4.6
V
VI
input voltage
5 V tolerant digital I/O pins;
VDD 1.8 V
0.5
+5.5
V
VDD = 0 V
0.5
+3.6
V
5 V tolerant open-drain pins
PIO0_4 and PIO0_5
0.5
+5.5
VIA
analog input voltage
pin configured as analog input
0.5
4.6
V
IDD
supply current
per supply pin
-
100
mA
ISS
ground current
per ground pin
-
100
mA
Ilatch
I/O latch-up current
(0.5V
DD) < VI < (1.5VDD);
Tj < 125 C
-100
mA
Tstg
storage temperature
non-operating
65
+150
C
Tj(max)
maximum junction
temperature
-150
C
Ptot(pack)
total power dissipation (per
package)
based on package heat
transfer, not device power
consumption
-1.5
W
VESD
electrostatic discharge
voltage
human body model; all pins
[7] -+6500
V
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